# Tag Info

1 There's a mistake in the PID connection. You must feed the quadrature component, i.e $U_q$ to the PID, not $U_d$. The setpoint of your PLL is $U_q = 0$ because you want your PLL to be in phase with your 3-phase input i.e. $U_d = 1, U_q = 0$. 2 - Perhaps there are hidden delays in the block you instantiated ? 3 - Notice the error equation of your PLL is ...
Two suggestions to move forward: Reduce $K_i$ to the point of an acceptable overshoot (this will provide the bottom line answer for comparison to the computations. Do system identification (Bode plots) on the open loop system and individual components to isolate the difference between implementation and loop model; the computations were compared below ...