Signal Processing

Questions tagged [hardware-implementation]

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Non radix-2 FFT hardware implementation : zero-padding vs custom algorithms

I am an FPGA engineer with some DSP experience, facing the situation of implementing a 1023 points FFT in a spread spectrum demodulator. As a straightforward solution, I would zero pad to 1024 and ...
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2answers
47 views

Lattice structure realization of an all-pole system

Given an IIR system with the system function, $$ H(z) = \frac{1}{2 + 1.4z^{-1} + 1.8z^{-2}} $$ I need to draw the lattice structure realization. I have drawn the lattice structure for $\frac{1}{1 + ...
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0answers
36 views

Reducing hardware demands for an adaptive and complex-coefficient FIR filter

I want to implement a complex-coefficient FIR filter with adaptive coefficients in hardware (FPGA). The inputs to this filter are the I and Q channel as separate wires. The outputs are the filtered I ...
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0answers
23 views

Simple Impulse Response DSP Hardware

I developed some complex chains of filters and crossovers. After that I have created IRs from the entire chains. Applying these IRs in software works perfectly. Now I wonder what is the easiest (and ...
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1answer
249 views

edge detection of 1-D signals

Would you please introduce me to some methods (or references) to do edge detection on some pulses (rectangular pulses embedded in noise). At first I apply some filters to smooth the signals, then I ...
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2answers
252 views

Implementing an analog approximation of an FIR filter given its impulse response

Problem: I have the impulse response of a matched filter(therefore its phase and magnitude response. See figure below) of a filter, and I need to implement its response using only off-the-shelf ...
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1answer
208 views

Suggestion for a DSP board to implement a Kalman filter in real-time at a rate of around 4MHz or higher

I have been attempting to implement a Kalman filter on an FPGA in VHDL and have got to the point that it works. However I have the issue that each variable requires 64 bits to be represented to get ...
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1answer
547 views

Sequence Length for a Linear Feedback Shift Register

What is the total length for the sequence for a linear feedback shift register generated with a maximum length sequence, before repeating?
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1answer
262 views

Can't make sense from VHDL butterworth filter implementation

I am trying to understand the VHDL implementation of the 3rd order Butterworth filter published on opencores. Supposedly the filter implementation gets away with only division and multiplications by 2 ...
5
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2answers
305 views

Audio DSP HW Recommendation

I'm very new to DSP hardware, so I am taking it upon myself to learn it with regard to Audio and Acoustic Signal Processing. I've learned quite a bit of theory in a graduate DSP course, but absolutely ...
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2answers
418 views

Hardware implementation of Gaussian noise generator

I am implementing a GNG using Verilog. The implementation is based on the IEEE paper "Hardware Architecture of a Gaussian Noise Generator Based on the Inversion Method". In this, i could not ...
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1answer
234 views

Architecture for high sample-rate FIR/IIR filter on FPGA or ASIC?

Assume we have a hardware (FPGA or ASIC) which can operate at a fixed processing frequency of $100\textrm{ MHz}$. Assume we have an input data stream of $1\textrm{GSPS}$ (which has been sampled using ...
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1answer
317 views

Can we determine if a filter is butterworth or chebyshev from its physical topology?

Can all analog filters be classified as Bessel, Elliptic, Butterworth or Chebyshev? Given a physical ladder topology of several stages of {L, C or LC} in {series or parallel}, is it possible to ...
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0answers
59 views

Estimating the power consumption of an arbitrary, real-time DSP algorithm

Consider a digital signal processing algorithm that operates over a block of $L$ [samples], with a real-time constraint $\tau$ [s] (i.e. its throughput must be $L/\tau$ [samples/s]). The theoretical ...
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1answer
164 views

how much of DSP (digital signal processing) is related VLSI?

Although,this question may not be very much related to the topic of discussion, but i just wanted to know how much of DSP (digital signal processing) is used in VLSI. Like in the industry or for the ...
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2answers
623 views

DSP Hardware for Detecting an Audio “Click”

I am working on isolating a specific audio click in a factory type setting. After my initial analysis I determined that a 2-pole High Pass Filter set between 500 and 800Hz would work best for me. The ...
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2answers
119 views

Embedded Image Processing System that sends photos to Smartphone via Bluetooth

I would like to create an embedded system that takes a Full HD photo by pressing a button,processes and compresses it(for ex. to jpg) and then sends it via Bluetooth to the smartphone - where it's ...
4
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2answers
639 views

Are SOS structures better for linear phase FIR filters?

I've seen many discussions suggesting that SOS's are often/usually the preferred structure for fixed point hardware filter implementations, since they preserve conjugate pairs, etc., but I've never ...
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1answer
33 views

How to accurately count the time period (hardware)?

Input : Square wave which sweeps over time domain. (about 1 MHz) Output: The time period of high/low value. Like the timer does, I would like to know the actual time (in sec) when the input goes high ...
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2answers
2k views

IIR filter implementation in Direct Form 2

I have implemented Direct Form 2 IIR filter. The input is the Kronecker delta function. I have written code for the response of the filter for Kronecker delta input. The code is: ...
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2answers
54 views

Acoustic record and store devices

I am working on a project involving analysis of bird sounds and I want to record these sounds in slightly remote locations. It is enough if the device can only record and store them (maybe in an SD ...
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2answers
189 views

What is the best OS for real time signal processing? [closed]

I'm implementing a BCI-Wheel Chair Control System where signal are extracted from the arm into MATLAB -> feature extraction -> classification -> Control signal The delay should be minimal between ...
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4answers
346 views

How many bits of precision are often used in fixed point DSP?

I understand FIR & IIR digital filters are often implemented in fixed point DSP hardware. I have also seen them implemented in software. Do companies make special purpose digital filtering chips ...
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1answer
298 views

Effect of bandwidth reduction in bit growth

I just want to ask, whenever you reduce a bandwidth of signal by filtering, I wonder why do you need to improve the number of bits used to represent that signal. The number of bit growth is $$\frac{1}...
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1answer
67 views

benefit of dividing the signal processing job into two computers? [closed]

I am not sure if this is the right place to ask this question. I am asking it anyway.. In Aircraft Airbus 320, control inputs from the pilot's sidestick are processed by two computers for different ...
9
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2answers
918 views

What are some face detection (not recognition) algorithms suitable for limited (embedded) processors?

I am looking at a hardware based platform for surveillance class of applications. I want to identify faces of people as they appear in the scene. I don't intend to really apply face recognition (...
7
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2answers
2k views

Low MIPS Video Encoder

I am looking for a low MIPS, low compression video encoder. This is for a 10fps, VGA type quality compression. What are my options? I need to be able to do this compression using a 150MHz ARM M4 CPU ...
4
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1answer
177 views

Apply decay envelope to waveform without multiplication

I'm trying to apply a decay envelope to a sinusoidal waveform using Verilog. Hardware constraints prevent use of multiplication to simply multiply by the envelope. The sine values and envelope values, ...
17
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2answers
3k views

Are there any standard implementation forms for tunable Butterworth filters?

One of the standard ways to implement a Butterworth filter is with a cascade of second-order sections, each corresponding to a pair of complex-conjugate poles. For a fourth-order filter, for example, ...