Questions tagged [hardware-implementation]
The hardware-implementation tag has no usage guidance.
40
questions
4
votes
1
answer
121
views
STM32F7 Discovery board vs dsp kit tms320c6713 vs Rasberry Pi?
We want to design dsp kit Labs for our undergraduate students for following tasks/topics.
1)Sampling and Quantization of real time Audio Signals on DSP Kit ; analyze the effect of Aliasing and ...
- 53
0
votes
0
answers
40
views
How to find lattice coefficients when k2=1?
$H(z)=1+2z^{-1}+z^{-2}$
We know the formula
$a_{m-1}\;(k)=\frac{a_m\;(k)-k_m\;a_m\;(m-k)}{1-k_m\;^2}$
Here $k_2=1$ That makes $a_{m-1}\;(k)=infinity$
How to find lattice coefficients of all pole IIR ...
- 31
0
votes
1
answer
73
views
Lattice structure-Lattice coefficients-Sign positive or negative?
This is the question
$$ H(z) = \frac{1}{2 + 1.4z^{-1} + 1.8z^{-2}} $$
My professor has told that we don't need to take those 2 values as negative and instead we can take them as positives(with the ...
0
votes
0
answers
69
views
How to find Lattice structure when k3=1?
I could not type this so I got a snip shot. Pardon me for that.
Here k3=-1. That means the formula
Here we will get x/0=∞. How to solve this question?
- 21
1
vote
2
answers
62
views
Saturation in magnitude estimation?
An magnitude estimate algorithm has been used for a while in which no multiplication is done. See link here: http://dspguru.com/dsp/tricks/magnitude-estimator. This method does have advantage in terms ...
- 11
4
votes
3
answers
400
views
Practical IIR filter implementation
I'm trying to implement a digital IIR filter on an FPGA and would be happy for some inputs regarding the actual digital implementation. I don't have a lot of experience with FPGAs and digital filters ...
0
votes
0
answers
77
views
Hardware implementation of multi rate FIR filter
I have designed a multi rate fir filter in MATLAB and I want to implement it in verilog.This is the block diagram.
Total number of taps are 391. Is there any way to automatically generate verilog ...
3
votes
0
answers
153
views
CIC filter internal register truncation
I try to implement CIC filter with truncation in hardware, but there is some misunderstanding. For some reason the output signal is broken.
My filter is N = 6, R = 20, M = 1, Bin = 16, Bout = 16.
(...
- 31
1
vote
0
answers
38
views
Why should wavelet re-synthesis produce an output when the main component is suppressed and what does this mean for denoising?
I understand that aliasing occurs in DWPT if the wavelet used is of low order since the "filters" are not perfect and the combination of down sampling and overlapping between bands causes ...
- 61
1
vote
1
answer
170
views
simulator for dsp kit tms320c6713?without using actual hardware kit tms320c6713?
As you know, most universities across the globe are closed due to pandemic and people are unable to acess research facilites ,so in such a scenario one wants to improve his dsp hardware programming ...
- 871
2
votes
1
answer
144
views
How to improve accuracy while converting floating point coefficients to fixed point in the case of an all pole IIR filter
I am having an all pole IIR filter of order 5 with floating point filter coefficients
...
- 93
2
votes
1
answer
87
views
Selecting a Digital Signal Processor for a Specific Image Sensor
I am working on developing a camera and I am trying to select hardware for the camera. I believe that I may need a digital signal processor to compress image data before it is transmitted to a ...
- 23
0
votes
1
answer
183
views
Non radix-2 FFT hardware implementation : zero-padding vs custom algorithms
I am an FPGA engineer with some DSP experience, facing the situation of implementing a 1023 points FFT in a spread spectrum demodulator.
As a straightforward solution, I would zero pad to 1024 and ...
- 1
0
votes
2
answers
181
views
Lattice structure realization of an all-pole system
Given an IIR system with the system function,
$$ H(z) = \frac{1}{2 + 1.4z^{-1} + 1.8z^{-2}} $$
I need to draw the lattice structure realization.
I have drawn the lattice structure for $\frac{1}{1 + ...
- 201
1
vote
0
answers
52
views
Simple Impulse Response DSP Hardware
I developed some complex chains of filters and crossovers. After that I have created IRs from the entire chains.
Applying these IRs in software works perfectly.
Now I wonder what is the easiest (and ...
- 11
-1
votes
1
answer
598
views
edge detection of 1-D signals
Would you please introduce me to some methods (or references) to do edge detection on some pulses (rectangular pulses embedded in noise). At first I apply some filters to smooth the signals, then I ...
- 61
0
votes
2
answers
364
views
Implementing an analog approximation of an FIR filter given its impulse response
Problem:
I have the impulse response of a matched filter(therefore its phase and magnitude response. See figure below) of a filter, and I need to implement its response using only off-the-shelf ...
1
vote
1
answer
253
views
Suggestion for a DSP board to implement a Kalman filter in real-time at a rate of around 4MHz or higher
I have been attempting to implement a Kalman filter on an FPGA in VHDL and have got to the point that it works. However I have the issue that each variable requires 64 bits to be represented to get ...
2
votes
1
answer
1k
views
Sequence Length for a Linear Feedback Shift Register
What is the total length for the sequence for a linear feedback shift register generated with a maximum length sequence, before repeating?
- 317
2
votes
1
answer
392
views
Can't make sense from VHDL butterworth filter implementation
I am trying to understand the VHDL implementation of the 3rd order Butterworth filter published on opencores. Supposedly the filter implementation gets away with only division and multiplications by 2 ...
- 123
6
votes
2
answers
345
views
Audio DSP HW Recommendation
I'm very new to DSP hardware, so I am taking it upon myself to learn it with regard to Audio and Acoustic Signal Processing. I've learned quite a bit of theory in a graduate DSP course, but absolutely ...
- 61
0
votes
2
answers
603
views
Hardware implementation of Gaussian noise generator
I am implementing a GNG using Verilog. The implementation is based on the IEEE paper "Hardware Architecture of a Gaussian Noise Generator Based on the Inversion Method". In this, i could not ...
2
votes
1
answer
333
views
Architecture for high sample-rate FIR/IIR filter on FPGA or ASIC?
Assume we have a hardware (FPGA or ASIC) which can operate at a fixed processing frequency of $100\textrm{ MHz}$. Assume we have an input data stream of $1\textrm{GSPS}$ (which has been sampled using ...
- 21
2
votes
1
answer
415
views
Can we determine if a filter is butterworth or chebyshev from its physical topology?
Can all analog filters be classified as Bessel, Elliptic, Butterworth or Chebyshev?
Given a physical ladder topology of several stages of {L, C or LC} in {series or parallel}, is it possible to ...
- 23
1
vote
0
answers
67
views
Estimating the power consumption of an arbitrary, real-time DSP algorithm
Consider a digital signal processing algorithm that operates over a block of $L$ [samples], with a real-time constraint $\tau$ [s] (i.e. its throughput must be $L/\tau$ [samples/s]).
The theoretical ...
- 368
1
vote
1
answer
224
views
how much of DSP (digital signal processing) is related VLSI?
Although,this question may not be very much related to the topic of discussion, but i just wanted to know how much of DSP (digital signal processing) is used in VLSI. Like in the industry or for the ...
- 75
2
votes
2
answers
918
views
DSP Hardware for Detecting an Audio "Click"
I am working on isolating a specific audio click in a factory type setting. After my initial analysis I determined that a 2-pole High Pass Filter set between 500 and 800Hz would work best for me.
The ...
- 21
1
vote
2
answers
151
views
Embedded Image Processing System that sends photos to Smartphone via Bluetooth
I would like to create an embedded system that takes a Full HD photo by pressing a button,processes and compresses it(for ex. to jpg) and then sends it via Bluetooth to the smartphone - where it's ...
4
votes
2
answers
1k
views
Are SOS structures better for linear phase FIR filters?
I've seen many discussions suggesting that SOS's are often/usually the preferred structure for fixed point hardware filter implementations, since they preserve conjugate pairs, etc., but I've never ...
- 141
0
votes
1
answer
35
views
How to accurately count the time period (hardware)?
Input : Square wave which sweeps over time domain. (about 1 MHz)
Output: The time period of high/low value.
Like the timer does, I would like to know the actual time (in sec) when the input goes high ...
- 80
0
votes
2
answers
3k
views
IIR filter implementation in Direct Form 2
I have implemented Direct Form 2 IIR filter. The input is the Kronecker delta function. I have written code for the response of the filter for Kronecker delta input. The code is:
...
- 95
0
votes
2
answers
64
views
Acoustic record and store devices
I am working on a project involving analysis of bird sounds and I want to record these sounds in slightly remote locations. It is enough if the device can only record and store them (maybe in an SD ...
- 3
-3
votes
2
answers
373
views
What is the best OS for real time signal processing? [closed]
I'm implementing a BCI-Wheel Chair Control System where signal are extracted from the arm into MATLAB -> feature extraction -> classification -> Control signal
The delay should be minimal between ...
- 591
5
votes
4
answers
548
views
How many bits of precision are often used in fixed point DSP?
I understand FIR & IIR digital filters are often implemented in fixed point DSP hardware. I have also seen them implemented in software. Do companies make special purpose digital filtering chips ...
- 489
0
votes
1
answer
353
views
Effect of bandwidth reduction in bit growth
I just want to ask, whenever you reduce a bandwidth of signal by filtering, I wonder why do you need to improve the number of bits used to represent that signal.
The number of bit growth is
$$\frac{1}...
- 21
-1
votes
1
answer
68
views
benefit of dividing the signal processing job into two computers? [closed]
I am not sure if this is the right place to ask this question. I am asking it anyway..
In Aircraft Airbus 320, control inputs from the pilot's sidestick are processed by two computers for different ...
- 111
9
votes
2
answers
935
views
What are some face detection (not recognition) algorithms suitable for limited (embedded) processors?
I am looking at a hardware based platform for surveillance class of applications. I want to identify faces of people as they appear in the scene.
I don't intend to really apply face recognition (...
- 5,589
7
votes
2
answers
3k
views
Low MIPS Video Encoder
I am looking for a low MIPS, low compression video encoder. This is for a 10fps, VGA type quality compression. What are my options? I need to be able to do this compression using a 150MHz ARM M4 CPU ...
- 806
4
votes
1
answer
188
views
Apply decay envelope to waveform without multiplication
I'm trying to apply a decay envelope to a sinusoidal waveform using Verilog. Hardware constraints prevent use of multiplication to simply multiply by the envelope. The sine values and envelope values, ...
- 41
17
votes
2
answers
3k
views
Are there any standard implementation forms for tunable Butterworth filters?
One of the standard ways to implement a Butterworth filter is with a cascade of second-order sections, each corresponding to a pair of complex-conjugate poles. For a fourth-order filter, for example, ...
- 4,707