Questions tagged [digital-to-analog]

A digital-to-analog converter (DAC, D/A, D2A, or D-to-A) is a system that converts a digital signal into an analog signal.

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28 views

First order hold from zero order hold filter

I'm stuck in this question for more than 4 hours. (h is the sampling period) I simplified the block diagram but it just seems impossible to get the FOH transfer function from the reduced block ...
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1answer
39 views

Modulate Bipolar(?) signal

I want to modulate this signal if possible with an Arduino, but have no idea what circuit can help me here. Let's ignore the timing and the measurements from the image for a moment, my problem is more ...
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2answers
164 views

DSP low pass filter (IIR) no longer works when changed to a new MCU

Having troubles understanding why a DSP low pass filter was that working on the M4 is no longer working on an M7. I recently switched over to a STM32H753ZI from a STM32L432KC. In addition to switching ...
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21 views

OFDM Signal Recovery with DAC & ADC

I have implemented 256-QAM based OFDM design on FPGA. The data flow is as follows - QAM -> Hermitian Symmetry -> IFFT -> Pilot Insertion -> Cyclic Prefix I have done Hermitian Symmetry ...
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21 views

FSK technique to superpose the digital communication on top of 4–20 mA signals

I start a working with HART devices and I really try to understand how digital data is transferred trough 4-20ma current loop. I start read this article: https://instrumentationtools.com/hart-...
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28 views

Quantization types

Suppose i have input sequence {-1.3,1.2,-0.2,-0.5,0.4,0.89,1.3} Which are uniformly quantized through a quantizer having range (-1.5,1.5) with 4 levels My calculted answers for- First method:mid rise ...
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22 views

SNR of μ-law companding

I know the snr after μ-law compression is $\text{SNR}\approx\frac{3L^2}{[\ln(1+ \mu)]^2}$ when $\mu \gg \frac{\max_t m(t)}{\text{rms}(m(t))}$, where $m(t)$ is the message signal, and $L$ the number ...
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79 views

D/A converter with

I am trying to figure out how to consider digital-to-analog conversion and how to consider oversampling based on a course I am taking online and figuring out the logic behind this. Unfortunately there ...
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9 views

How to match plot with formula in DNL INL

by definition DNK(K)=(V_out(K+1)-V_out(K)-Vlsb)/Vlsb So for K=2 DNL(K)=(V_out(K+1)-V_out(K)-Vlsb)/Vlsb=((3/8)-(3/8)-(1/8))/(1/8)=-1 [LSB] INK(K)=(V_out(K)-KVlsb)/Vlsb=(3/8)-2(1/8))/(1/8)=1 In the ...
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1answer
46 views

Decoder implementation

Im struggling to implement / build convolutional decoder . I've done implementation of FEC encoder which it's as shown in the photo below: So this is the encoder that I've implemented, and I want to ...
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21 views

What is the pipeline DAC tollerable offset from plot

I have analyzed the circuit in full extent as shown bellow. I know that I showed imagine two-stage back to back and see "which input could handle both". Could you please show how exactly I ...
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1answer
91 views

How does the world's simplest sigma-delta DAC work?

I have run into a simple delta-sigma (supposedly, where is the delta part?) DAC implementation utilizing an accumulator and then using the overflow bit as a modulated 1-bit output. From https://www....
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22 views

Resources on multiplexer and demultiplexer?

If I search multiplexer in Google and start reading, I find sources that describe a multiplexer as a device that selects between several analog or digital signals, then outputs a single signal. For ...
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3answers
129 views

What causes this type of distortion in a constellation I/Q plot?

I'm transmitting QPSK through a digital pulse shaping filter (RRC, 35% excess BW, 2 samples per symbol, 64 taps) at a rate of 56Msym/sec. Receiving it on standard lab equipment (Vector signal ...
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1answer
57 views

DDS generated chirp and antialiasing filter : what is the best suited filter for a chirp?

I am defining the required antialiasing (analog) filter for a chirp generated by a DDS. The chirp is produced in a FPGA (NCO generation) and forwarded to the DAC for the samples generation (with ...
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37 views

How to filter OFDM Signal with an analog filter

I am using OFDM system in Matlab, I want to use an analog filter after the DAC. Because we don't a simulation for the DAC, the generated OFDM analog signal does not have a specific frequency (they ...
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39 views

Sample and Hold Circuit at Digital to Analog Converters

Does DACs contain sample-and-hold circuits? I am a bit confused thanks
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Aperture Jitter in Digital to Analog Converters

I have noticed in the literature that there is an internally induced timing jitter inside Analog to digital converters called (aperture jitter). It is caused by the sample-and-hold circuit of the ADC. ...
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1answer
31 views

Reconstruction of Contiuous - Time Signals

In terms of analog signals, we can represent digital signal as : $$ x[n] \triangleq x_{a}(nT) = \int_{-\infty}^{\infty}X_{a}(f) \, e^{j2\pi f nT} \ \mathrm{d}f $$ While if we focused on the integral ...
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2answers
80 views

DAC and ADC architecture in SDRs

What are the DAC and ADC architectures in SDRs for inphase and quadrature phase channels? Do we have separate ADC and DAC for each channel or there is some clever way that they are multiplexed to ...
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2answers
92 views

Types of interpolation used for reconstruction in DSP?

What are the different types of interpolation used in DSP for reconstruction of analog signal from discrete/digital signal I am able to somehow learn two types of interpolation 1st is "zero order ...
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28 views

When to choose ZoH over Tusin method to transform continuous to discrete

I have a continuous transfer function here: a 2nd Order Butter Worth filter $$\frac{1}{6.416\cdot10^{-11}s^2+1.33\cdot10^{-5}s+1}$$ How would one choose which discrete method to use to transform ...
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1answer
160 views

DDS - Supersampling above the FPGA clock frequency

I'm using a Xilinx Virtex 6 FPGA with 200 MHz clock connected to a 1.6 GSa/s DAC to generate sine waves of up to 800 MHz using 8 parallel Xilinx DDS Compiler IP cores. Initially, I calculate the 32 ...
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1answer
554 views

What is the difference between (Sample Timing Offset), (Carrier Frequency offset), and (Sampling Frequency Offset)?

Briefly, can anyone explain to me what is the difference between (Sample Timing Offset), (Carrier Frequency offset), and (Sampling Frequency Offset)? and is Sampling Frequency Offset (SFO) like STO ...
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3answers
174 views

Digital to analog aliasing or mirror query… DAC can output negative frequency?

Using a clock Fs = 1 MHz. The Digital to Analog (DAC) can make frequencies upto 500 KHz. 500 kHz to 1 MHz is an alias? Or is it called a mirror?? Is aliasing a concept only on the ADC and sampling ...
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2answers
100 views

Direct Digital Synthesis - Super Sampling - Unknown Harmonics

I'm using a Xilinx FPGA (Virtex) with 4 DDS cores (each supplied a 250MHz clock) used in parallel to provide a samples to a DAC38J82IAAV from TI, 16 bit DAC running at 1 Gsps. The four cores super ...
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4answers
2k views

reconstruction filter - How does it actually work?

I'm trying to form my own understanding on the religious war around using 192kHz as a sampling rate for playback (the Internet seems to have a wealth of material on both sides). I'm struggling to ...
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1answer
53 views

explanation of Hybrid systems?

I want to study Detailed explanation of hybrid systems?Which incorporate both continuous and discrete time signals & systems? for example In which a continuous-time input signal is transformed ...
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2answers
558 views

Audio processing. Is it possible to directly access the decoded audio data going into the analog input of a computer

When a computer transcodes an audio file from one file format to another, does the computer first decode it into the raw digital stream (exactly what is fed into the DAC for the audio output) , or ...
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199 views

Why do IQ Impairements, Quadrature Skew and DC offset have these geometric effects on the constellation?

I'm studying telecommunications, and would like to be sure to understand the maths behind these effects. For IQ Imbalance and DC offset, it seems pretty clear why we observe a rectangle shape or a ...
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21 views

How can we do finite-step signal sampling in practical?

The signal has infinite length. We cannot sample it with a whole length. How can we truncate a infinite signal and sample it in finite step? And then how can we analyze it.
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1answer
4k views

What is the difference between undersampling and oversampling in analog to digital conversion ?

When converting a signal from analog to digital, we observe undersampling and oversampling. Does oversampling means that the sampling frequency is greater that the signal's frequency and does ...
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1answer
60 views

About Data spreading in CDMA

If we have data we need to transmit which is $i$, so we should multiply is using XOR function with spreading code $y$. How many bits (Maximum and Minimum) should $i$ and $y$ can have ?
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1answer
132 views

confusion between frequency and amplitude in digital to analog and vice versa conversion

bandwidth is defined as the difference between the highest frequency and lowest frequency. amplitude is the distance between the, let's call it a crest and a trough, in a wave. cycle is the time per ...
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87 views

Why do we use conjugate transpose IFFT in OFDM

I have a question regarding the OFDM and using the conjugate transpose of vector (matrix). As you know, if we have a block of data,let's call it $X_n$, consisting of $N$ data symbols, we should ...
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1answer
111 views

Multirate Signal processing for matching DAC of the SDR

I have been breaking my head for a long time. Please help with this..any input would be helpful! I am trying to implement a OFDM system using SDR (USRPN210 for Transmitter and USRP2 for receiver) ...
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1answer
124 views

Quantization of analog sound signals

I am using Librosa to detect pitch in a guitar audio signal. I have very little background in signal processing, and I was quite confused with the distinction between analog - digital signals and ...
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2answers
4k views

Bandwidth vs. sampling rate of DAC

What is the difference between the sampling rate and the bandwidth of a DAC? I have found in one paper a DAC speced as 15GHz 3dB bandwidth, and 64GS/s sampling rate, and I haven't been able to relate ...
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2answers
786 views

How does the RaspberryPi radio hack convert digital GPIO signals to an FM signal?

After having looked at various explanation of how the RaspberryPi FM transmitter hack works, I realize there are some fundamental pieces missing. Most explanations talk about how to construct a ...
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1answer
654 views

Is dithering and noise shaping needed when upsampling an audio signal 8 times (from 44.1kHz to 352.8kHz for example)

The main purpose of upsampling before digital to analog conversion is to move quantization noise far beyond the audible spectrum to be able to filter it out by simple second-order low pass analog ...
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2answers
816 views

Is it normal that a DAC outputs spikes?

I'm using a Raspberry Pi 2 and an AD/DA Board, with no extra circuit. Reading on the internet though, I found that DACs need a low pass filter in their output, and I don't understand if the behaviour ...
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2answers
4k views

Why analog anti aliasing filter is used before analog to digital converter when there is already a digital filter after ADC?

Normal data acquisition consist of: Analog anti aliasing filter( Sampling frequency : $5\textrm{ kHz}$) ADC - Digital Filter - (Sampling : 200K samples /sec) Digital low pass filters Filters DAC ...
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1answer
643 views

How is a PCM byte converted to a voltage level?

16-bit signed PCM would have possible values of ~-32,000 to ~+32,000. How is this value converted to a voltage level for the speaker? If a DAC outputs 5VAC, the values would be ~+-5v. How is the ...
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3answers
222 views

Linearizing digital-analog converters

I'm looking at ways to improve the effective resolution of DACs. It seems that element mismatch (i.e. integral non-linearity) is the main contributor to distortion in modern DACs. Apart from ...
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406 views

DAC ADC for BPSK modulation

I have written Matlab script for BPSK modulation. The way my code works is as follow: series of 0 and 1----> NRZ data (continuous rectangular pulses with amplitude -1 and 1)--->multiply by carrier----...
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1answer
2k views

DAC implementation in OFDM

In an OFDM transmitter, after IFFT & CP block, a DAC block is used.Since the output of IFFT is complex, and the input to DAC should be an integer, how can we integrate the two blocks? I ...
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4answers
1k views

From a physics perspective, why does D/A quantization error result in a noise floor?

For the last week or so I have been trying to understand how quantization error results in the noise floor outside of a mathematical perspective and I haven't really had any luck finding a source that ...
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2answers
231 views

What's the model for a DAC followed by a sampler?

I have a situation where a sampled signal is passed through a DAC and re-sampled by a switched capacitor circuit. I can't see a model for this in the literature. The standard model of a DAC is the ...
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1answer
543 views

DAC and sample and hold effect

I am having some trouble understanding how a digital signal gets converted back to an analog signal. Why is the "sample and hold" effect a problem?