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Questions tagged [analog-to-digital]

An analog-to-digital converter (ADC, A/D, or A-to-D) is a system that converts an analog signal into a digital signal.

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Can gain calibration be used in PC in the outputs of 2 ADCs?

Some amplifiers don't have any analog differential amplifies (for example the g.USBamp). Instead it deducts 2 separate ADCs (not time multiplexed) in different channels producing both differential ...
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Estimate bits per pixel from RAW photo

Nowadays many consumer products like smartphones or action cameras support RAW photos. Typically, they spit out a DNG/TIFF file with 16 bit values. However, the actual bit depth of the A/D is rather ...
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Phase noise influence on ADC in bistatic FMCW Radar

I am currently studying the topic of oscillator phase noise in frequency modulated continuous wave (FMCW) radar. In my specific case, the radar is implemented on an FPGA (AMD RFSoC). Thus, the echo is ...
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FFT Signal Analysis - Hardware Configuration

I have began working on a project that entails using an 1MHz Unipolar 12-bit ADC that has two inputs connected to a buffer opamp. One channel on the opamp is inverting, and the other is non-inverting. ...
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Optimized Filters for Delta-Sigma Converters with Finite Time Limit

Quick read of my question The optimum estimator of the mean for N samples of a sampled DC level in the presence of white noise is a block average (an average with all samples given equal weight). What ...
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Software/DSP based differential and common emulation in ADC

A differential op amp amplifies the difference and rejects the common signal. Can you create this effect in ADC (2 or more ADC, not timed multiplexed) and firmware/software by using say channel $A$ ...
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BERT (bit error rate test with ADC )

I'm trying to make a digital decoder. I sample a digitally modulated signal with the LTC2387, an 18-bit 15MHz SAR ADC. The carrier signal is at 2.1MHz, and is digitally mixed down to DC to obtain the ...
Abdel Djaferbey's user avatar
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Peak prediction

In my block, I am changing the gain of Amplifier (PGA) in step of +/- 1dB depending on the control voltage derived from the AGC (Automatic Gain Control). But can I change the gain of PGA in one shot ...
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Why power metric is used for AGC control signal instead of some other metric like peak?

I am just understanding AGC : As per my understanding, AGC is a digital block which controls the gain of the amplifier, placed after ADC, such that ADC doesn't clip the incoming data and maintains ...
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Is it possible to cheaply convert analog to digital at the gigahertz sampling rate?

Consumer software-defined radio devices have become much cheaper and offer sample rates in the tens of million samples per second, but that still seems too low to parse WiFi or ethernet in-software. ...
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Number of bits after combination

I have 8 digital complex input channels digitized with 8 bits each and I want to combine them with certain complex weights. In the easiest case where all weights would be 1 the combination would be ...
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DAC/ADC sample rate selection for modem

So I have a very basic on which I couldn't find much details anywhere. I'll start with an example: I have to transmit 100Mbps of BPSK data. Roll-off factor is 0.25. This data will be processed at ...
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In the frequency domain of a phase-shift keyed signal, why there are are prominent frequency components which are multiples of sampling frequency?

In the frequency domain representation of a digital phase modulated signal, why there are prominent other frequency components which are multiples of the sampling frequency, other than the main ...
Kiran Gunathilaka's user avatar
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What is the standard data format for transferring IQ data between interfaces?

I've seen IQ data typically combined within a single 32 bit word when sending streams of data between different components. (i.e. I & Q are both signed fixed point integers with 16 bit word length ...
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ADC output rate, undersampling and decimation

I have an ADC working with a sample rate of 960 Msps, my signal being located at the 3rd Nyquist region (I am undersampling). Input signal bandwidth is centered at 1200 MHz with a bandwidth of 120 MHz....
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adc output signal magnitude question

We have an adrv9002 that has built in DAC and ADC that takes and gives IQ samples. I did a test to verify functionality but don't understand what I am seeing. Take a RF tone from a signal generator ...
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Benefit of Anti-Aliasing for Wideband Finite Time Duration Signals prior to Sampling

Most literature about sampling explains the need for anti-alias filters in terms of periodic signals, preventing a periodic signal with frequency greater than half the sampling frequency from ...
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ADC response inversion to Gaussian noise

Assuming the input to an ADC is a Gaussian white noise signal, and being a bit idealistic in all senses, is there a theoretical expression that links input power to output power which can be inverted, ...
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Sample Use vs Sampling Frequency

I need to acquire an analog signal via an ADC and send it via a digital communication line (CAN bus) with a given frequency $f_{send}=100Hz$. If I understand correctly this means that this constraint ...
Jhonathan Asimov's user avatar
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Step signal for ADC testing

IEEE std1241-2010 specification part 4.2.3. step signal setup part shows like this design What should the test setup described in section numbered be like? Is it enough to give one pulse and read it ...
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ADC bias, noise and number of bits under Gaussian signals

I'm digitizing a zero-mean complex Gaussian white noise signal with certain variance, through independent I/Q baseband sampling (two ADCs). The noise variance (power) depends on the thermal emission/...
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Discrete Frequency representation for central frequency/ discretize up-converted signal in time and frequency

I want to analyze a signal after up-conversion in discrete time and frequency, for example: Let's assume a continuous up-converted signal is: $$e^{j2\pi ft} \cdot e^{j2\pi f_c t} = e^{j 2 \pi (f+fc) t}...
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Can the NODAL DK Method Be used for discretizing an analog circuit with OTAs?

I'm exploring the discretization of analog circuits and have come across the NODAL DK method as a potential technique. I'm curious if this method is suitable for circuits that incorporate Operational ...
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Fixed point number scheme IIR filter with ADC

I am a student working with digital circuits. I just started a term project with someone else working on an ADC. I need to design a IIR filter in verilog. If the output of an ADC represents 1V by ...
Bowen Liu's user avatar
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Difference between ADC dynamic range and voltage resolution?

Say I have a 10-bit SAR ADC with a $5 \ \text{V}$ reference. I calculate its resolution to be $$\Delta V_\text{lsb} = \frac{5 \ \text{V}}{2^{10}} = 4.88 \ \text{mV} \approx 5 \ \text{mV}. $$ So for a $...
Carl's user avatar
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How does aliasing affect bits in an ADC?

I want to measure a signal whose frequency spectrum is infinite, but I am particularly interested in the frequency range $ 0 - 500 \ \text{Hz}$. I have a 12-bit ADC. The ADC has dynamic range $ 6 \ \...
Carl's user avatar
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Digital Low Pass Filter and PWM Signal

I have a PWM signal going into an ADC. After the ADC the signal is being filtered using an IIR single pole filter. Performance is exactly what I want with one exception. The purpose of the filter is ...
Tony's user avatar
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Direct-digital phase noise measurement reference phase scaling

The direct-digital phase noise measurement technique is described in "Direct-Digital Phase-Noise Measurement" by Grove (DOI:10.1109/FREQ.2004.1418466, PDF link). The basic architecture of ...
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Decoding an analogue signal for a given sampling and signal frequency that aren't in sync

I am trying to decode an analogue signal, that is intended to be converted to a digital one and decoded as USART communication. In the image shown the blue trace is the analogue signal, and the ...
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Handling asynchronous MCU I/O peripherals

Technical Background I'm making an audio processing board with an onboard microcontroller that takes in data via I2S from an ADC, applies digital filters, and outputs a stream of the same samplerate ...
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Output of sigma delta ADC, bit resolution, filtering

In a sigma-delta ADC, the sigma-delta modulator outputs a digital stream of 0's and 1's which are then low pass filtered and decimated. Where does the bit resolution of ADC come into the picture? What ...
user3005720's user avatar
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Relationship of ADC resolution and 'lossless' float data type storage

For a given digitised voltage trace, I want to avoid any quantization error introduced via an insufficient precision of the float data type – and at the same time reduce the memory cost. However, I am ...
Helmut's user avatar
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sample rate conversion

I have read many of the posts here on the stack regarding sample rate conversion but have yet to find one that does not rely either upon asynchronous or synchronous clocks. It occurs to me that the ...
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How to find the variance of a noise signal distorting an ADC measurement

Say we have a 12-bit ADC measuring a signal with a voltage range of 0-10V, but the signal is corrupted by uniformly distributed 3-bit white noise. What's the correct way to get the variance of the ...
Mikayla Eckel Cifrese's user avatar
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low-latency ADC and DAC

I am recently trying to use ADC and DAC with low latency and high speed. I wonder what are the ADCs and DACs with the lowest latency over 1Gsps?
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Time-interleaved ADCs, Nyquist zones et al

I am trying to decipher some notes on a Time-interleaved Analog-to-Digital Converter with 4 sub-ADCs (the author is unreachable at the moment), but there are few things obscure to me so I was hoping ...
gangrene's user avatar
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Delta sigma modulator harmonics appearing with a sine wave input

I am simulating a first order delta sigma modulator (DSM) used as an ADC. The input to my DSM is a full scale sine wave. The power spectral density I expect from the DSM output is as follows : The ...
Nicolate's user avatar
1 vote
1 answer
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Dynamic Range Scaling for Delta Sigma Modulation

I've been trying to follow along with this example in the book "Understanding Delta Sigma Data Converters" and I am completely confused as to how the authors came about the appropriate ...
NaP's user avatar
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3 votes
1 answer
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Optimal Input Range for ADC with Specified ENOB

I'm doing the gain budget for a receiver that feeds into an ADC. I want to know what the best input range should be into the ADC so that I can detect down to the MDS (minimum discernible signal) while ...
Jim's user avatar
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Which command should be used for quantization of a signal in MATLAB?

I want to convert analog signal to digital form using Matlab. I know that this will need two steps (sampling and quantization) but I am confused which command should be used for quantization? ...
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transformation methods for digital filters

i have the following question: in digital filter design what's the difference between the methods of transformations : bilinear vs impulse invariance vs Euler vs step invariance. thank you! Here is a ...
imene's user avatar
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DSM Model Not Producing Expected Noise Shaping

I am trying to design a 2nd Order CIFB DSM ADC on Simulink based off the values I have extracted from Richard Schreier's Delta Sigma Modulation Toolbox. However, when I ran the model according to the ...
NaP's user avatar
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2 votes
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Sigma Delta with counter instead of filter

in most applications the 1-bit output datastream of a sigma-delta ADC is converted via a filter. What's the advantage over counting the ones/zeroes and averaging over the results? For a simplified ...
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Noise variance estimation

could anyone recommend some articles how to estimate noise variance for the single carriers system with burst mode transmission (preamble+data TDMA)? My goal at the beginning is to develop skills how ...
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Resampling in real-time with non-integer ratio

I have a classifier that is trained on a dataset sampled at 100Hz. I am using this classifier on a MCU (the teensy 4.0 dev board) for inference and not training. However, the ADC chip I am using ...
NeuroEng's user avatar
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Performance Effects of Dropping ADC Least Significant Bits before DSP processing (Besides the Obvious)

What would be the effect of dropping LSBs of an ADC on the performance of a DSP system apart from the obvious reduction in dynamic range. For example if there is a 14 bit ADC and only 10 bits are used,...
malik12's user avatar
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How to emulate lower resolution digitized data (higher step-size)

I am a statistician by training, and I am very new to signal processing, but I would appreciate some help and patience! Suppose I have a digitized signal measured at a given frequency, range, ...
Lacey Etzkorn's user avatar
1 vote
1 answer
725 views

SQNR vs SNDR (with regards to Delta Sigma Modulation)

With regard to delta-sigma modulation, I understand that SQNR is the ratio of the signal power within our frequency bandwidth to the noise power within our bandwidth (in-band quantization noise). What ...
NaP's user avatar
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6 answers
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What's the meaning of negative frequencies after taking the FFT in practice?

Suppose I have a signal $x(t)$ with baseband bandwidth $W$ Hz and power $P$, and consists of $K$ samples, and I draw the two-sided power spectral density (PSD) of this [baseband] signal in MATLAB as <...
Math_Novice's user avatar
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1 answer
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Interpreting SQNR from a Graph

I'm pretty confused about SQNR/SNR conceptually. I understand that this is a function of the power of the signal to the power of the noise. Is it not the case that we would be able to derive a value ...
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