I have an ADC working with a sample rate of 960 Msps, my signal being located at the 3rd Nyquist region (I am undersampling). Input signal bandwidth is centered at 1200 MHz with a bandwidth of 120 MHz. Once sampled with 12-bit the same ADC uses digital down-conversion and decimates by 8. Number of bits increases from 12 to 16 after I-Q down-conversion. However, I don't really understand how to compute the output rate considering all these aspects (neglecting further encoding).


1 Answer 1


You are sampling at at 960 MSps rate. If you decimate that by 8, then the output rate is $960/8 = 120$ MSps. If this data is 16 bits on I and 16 bits on Q, each at 120 MSps, then the throughput needed is $120E6\times 16\times 2 = 3.84$ Gbps.

Further considerations. The 12 bit ADC likely has a lower effective number of bits (ENOB on ADC datasheet). Decimating by 8 with a traditional ADC will only increase the effective number of bits by $10\log_{10}(8)/6.02 = 1.5$ bits. You may have 16 bits out but the effective number of bits (from which you can predict the ADC noise floor) will be much lower.

The final sampling rate of 120 MSps could realistically handle a waveform up to 100 MHz of BW as you need some additional frequency space for anti-alias filtering prior to down-sampling in the decimation process. The more margin the simpler the decimation filter will be.

Adding, the OP did a nice job with frequency planning for this undersampling application, placing the "Digital IF" frequency at $f_s/4$ which simplifies the analog anti-alias bandpass filter required before the ADC by keeping the alias frequency locations in the Input Spectrum (where noise exists) equidistant from the band of interest (see post #61391 for further details on that):

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  • $\begingroup$ However what's the output bitrate, considering the complex output samples? $\endgroup$
    – Albert
    Mar 5 at 14:07
  • $\begingroup$ The output rate in "bits" are after you demodulate, so depends on the waveform (BPSK, QPSK, QAM) etc alone, not the ADC (assuming the ADC can handle the BW and dynamic range). All you have here is a similarity to downconverting first and direct sampling with two ADC's (I and Q) at a 120 MHz sampling rate. $\endgroup$ Mar 5 at 14:09
  • $\begingroup$ I'm sampling Gaussian noise. This means 2 x 120 Msps x 16 bit = 3.84 Gsps total output rate? (I acknowledge your considerations on the ENOB though) $\endgroup$
    – Albert
    Mar 5 at 14:17
  • $\begingroup$ Ah you are referring the the data rate for the samples, I understand and will add that. $\endgroup$ Mar 5 at 14:26
  • $\begingroup$ Understood thanks! $\endgroup$
    – Albert
    Mar 5 at 14:29

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