# Fast-settling CIC/FIR filter design

I am investigating the properties of the cascaded integrator comb (CIC) filter (for a $$\Sigma\Delta$$-modulator). I have two questions:

1. What's the correct method to design a fast settling decimation filter, is the combination of SINC3+SINC1 in the right direction? or any other topology? (narow bandwidth LPF, decimation ratio osr, settling within one cycle osr/Fs, also with good anti-aliasing? better than SINC1?)

2. Any alternative method to improve my calculation speed? Is my method too clumsy?

Below is what I have done in Wolfram Mathematica.

1. SINC1

The simplist one, SINC1's transfer function, it's impulse response length is osr

osr=128
normalSinc1 = (1 - z^(-osr))/ (1 - z^-1);
normalSinc1Freq = (normalSinc1/osr) /. z -> Exp[I*\[Omega]];
normalSinc1FreqPlot =
Plot[20*Log10[Abs[normalSinc1Freq]], {\[Omega], 0, \[Pi]},
PlotStyle -> Blue];
normalSinc1Time := If[InverseZTransform[normalSinc1, z, n] > 0, 1, 0]
For[n = 0, normalSinc1Time > 0, n++]
normalSinc1ImpluseLength = n


after decimation by osr, alising effect of power

(*ideal brickwall lowpass filter, bandwith=1/osr *)
idealOSRpower = Integrate[Sqrt[0.5]^2, {f, -1/osr, 1/osr}];
(*Normal SINC1 power after decimation, Ratio=1 *)
normalSinc1FreqPower = Conjugate[normalSinc1Freq]*normalSinc1Freq;
normalSinc1FreqPowerSample =
Integrate[normalSinc1FreqPower, {\[Omega], -\[Pi], \[Pi]}]/(2*\[Pi]);
normalSinc1Ratio = normalSinc1FreqPowerSample/idealOSRpower


2. SINC3

Then I do same thing for SINC3 filter, I found the caculation efficiency is very low, is my method is too clumsy? Any method to improve the calculation speed? Thank you!

normalSinc3 = (normalSinc1)^3;
normalSinc3Freq = (normalSinc1^3)/osr^3 /. z -> Exp[I*\[Omega]];
normalSinc3FreqPlot =
Plot[20*Log10[Abs[normalSinc3Freq]], {\[Omega], 0, \[Pi]},
PlotStyle -> Black];
normalSinc3Time := If[InverseZTransform[normalSinc3, z, n] > 0, 1, 0]
For[n = 0, normalSinc3Time > 0, n++]
normalSinc3ImpluseLength = n


the power after decimation

(*Normal SINC3 power after decimation Ratio=0.55 *)
normalSinc3FreqPower = Conjugate[normalSinc3Freq]*normalSinc3Freq;
normalSinc3FreqPowerSample =
Integrate[
normalSinc3FreqPower, {\[Omega], -\[Pi], \[Pi]}]/(2*\[Pi]) ;
normalSinc3NBW = normalSinc3FreqPowerSample/idealOSRpower


2. Fast Settling SINC3+SINC1?

Now I understand, if my Data Ouput Rate is Fs/OSRsettling time is:OSR/Fs for SINC1;(3*OSR-2)/Fs for SINC3;

Is it possible to design a filter (FIR/CIC) to achieve both fast settling (with one cycle osr) and good anti-aliasing? Then I try the combination of SINC3+SINC1. Notice! This calculation is very time-consuming!

(* sinc3(osr=r1) + sinc1(osr1=r2) *)
osr=128;
r1 = 4;
r2 = osr/r1;
fastSincN = ((1 - z^-r1)/ (1 - z^-1))^3;
fastSinc1 = (1 - z^(-r2 *r1))/ (1 - z^(-r1));
fastSinc = fastSincN*fastSinc1;
fastSincFreq = fastSinc/(r1^3)/r2 /. z -> Exp[I*\[Omega]];
fastSincFreqPlot =
Plot[20*Log10[Abs[fastSincFreq]], {\[Omega], 0, \[Pi]},
PlotStyle -> Red];
fastSincTime := If[InverseZTransform[fastSinc, z, n] > 0, 1, 0]
For[n = 0, fastSincTime > 0, n++]
fastSincImpluseLength = n
fastSincImpluseLength2 = 3*r1 - (3 - 1) + r1*(2^Log2[r2] - 1)/(2 - 1)


The Impluse Response Length fastSincImpluseLength is 134, which is close to osr. The fastSincImpluseLength2 is the relationship I summed up. Unfortunately, I found the anti-alasing capacibilty is very very poor, which is close to SINC1.This calculation is very time-consuming!

(*Fast SINC power after decimation,Ratio=0.98 *)
fastSincFreqPower = Conjugate[fastSincFreq]*fastSincFreq;
fastSincFreqPowerSample =
Integrate[fastSincFreqPower, {\[Omega], -\[Pi], \[Pi]}]/(2*\[Pi]);
fastSincRatio = fastSincFreqPowerSample/idealOSRpower


A first order CIC filter for decimate by $$N$$ is mathematically identical to the cascade of a moving average filter over $$N$$ samples, followed by the down-sampler. This is a linear phase filter whose group delay will be $$(N+1)/2$$. Increasing the order of the CIC is equivalent to cascading multiple first order CIC filters, with the commensurate increase in delay.   