in most applications the 1-bit output datastream of a sigma-delta ADC is converted via a filter. What's the advantage over counting the ones/zeroes and averaging over the results? For a simplified design i want to avoid something like an FPGA and use a µC (32-bit ARM) instead. In contrast to filter calculations, counting pulses requires next to no load on the µC. My basic idea is:
- count the amount of 1's over 2^N clock pulses (e.g. 16 bit = 65536 pulses)
- inspect the result to account for ADC behaviour (e.g. values that indigcate out of range)
- calculate arithmetic mean of the last X results (e.g. 16)
What are the disadvantages over the classic approach?