0
$\begingroup$

What would be the effect of dropping LSBs of an ADC on the performance of a DSP system apart from the obvious reduction in dynamic range. For example if there is a 14 bit ADC and only 10 bits are used, will it affect any other area of performance? especially if the ENOB of the ADC in the system was 10 bits to begin with?

Would it not effect the processing gain being achieved by the DSP (e.g. FFT processing gain)?

$\endgroup$
2
  • $\begingroup$ I dunno why you're forced to keep only 10 bits to begin with, but this operation is precisely what we call "uniform quantization". Normally, when we're forced to quantize the word width to a less wide width, dithering and/or noise shaping is helpful to prevent the worst artifacts that come from straight uniform quantization. Perhaps if the ADC is so noisy to begin with, it is self-dithered, but I wouldn't trust that. $\endgroup$ Commented Nov 20, 2022 at 18:36
  • $\begingroup$ @robertbristow-johnson Just asking out of curiosity but the reason could be any, for example to reduce the data transmission bandwidth or to reduce the sample data buffer size requirements etc. I am sorry I did not understand the later part of your comment, isn't the quantization uniform in either case, non-uniform quantization would occur if my step sizes for different amplitude levels are different. My understanding of noise dithering is that it is noise we add purposefully to toggle the minimum quantization level so that later we can pull the signal from the noise using processing gain $\endgroup$
    – malik12
    Commented Nov 21, 2022 at 4:22

2 Answers 2

2
$\begingroup$

What would be the effect of dropping LSBs of an ADC on the performance of a DSP system apart from the obvious reduction in dynamic range

None really. Technically it increases the level of quantization noise so it primarily affects your SNR.

However if your your ADC has only 10 effective bits to start with, the impact on the SNR is very small.

There is a difference between dropping the word length to 10 bits or staying with 14 bits and just zeroing out the 4 LSBs. The former does indeed reduce dynamic range the latter one only reduces SNR.

Would it not effect the processing gain being achieved by the DSP (e.g. FFT processing gain)?

Not directly. However with a lower word length you may have to use different scaling management to prevent overflow and clipping. That depends on the specific algorithm, the data and the word length.

$\endgroup$
1
  • $\begingroup$ thanks for your response, I am still slightly confused about the part regarding dynamic range and SNR reduction. For example even with 10 bits ENOB lets say I had signal embedded in noise which was only toggling the last 3 bits, then when zeroing out the last 4 bits won't I also lose the ability to use processing gain to lower the noise and detect that signal as well? $\endgroup$
    – malik12
    Commented Nov 21, 2022 at 7:04
1
$\begingroup$

Well, there are some advantages and disadvantages for specific tasks. I've examined the case where we try to do some modifications on the bit number of the samples just after the ADC stage.

So, let's say that we feed a periodic square wave, which jumps between, say, 0 V and 5 V, to a 14-bit ADC. Also, say that the noise power on the input signal is so low so that during conversion, amplitude changes on the input signal due to the noise is below the resolution of the ADC in terms of voltage. In this case, 0 V and 5 V are represented as $00000000000000$ and $11111111111111$, respectively. Theoretically, we can throw out those 13 bits on the right hand side of the MSB (most significant bit) of those two binary representations because we just have two levels to show. Therefore, by doing so;

  1. Bit efficiency is increased as now, we represent the two levels with the minimum required amount of bits, i.e., 0 for 0 V and 1 for 5 V.

  2. Amount of time to process each sample is reduced as the upcoming sections of the system deals with comparably small bit count at a given time. Thus, the overall computation time is reduced.

  3. Also, which depends on the designer, complexity of the DSP system may be decreased.

The above outcomes are more likely to occur under ideal and suitable conditions.

So, what if we work with an analog arbitrary signal which has a variety of voltage levels? Again, assume that the noise effects on the input signal is very low. If we want to illustrate that signal in the discrete domain as close as possible to its analog form, keeping the amount of bits to show each sample is a good choice as, for example; some voltage levels may be gathered and shown as $11111111111111$, $11111111111110$, and $11111111111101$. If the last two or more bits of those binary information is omitted, all of the three different levels of the input signal becomes equal in the discrete form. This, depends on how precise the system should be according to the needs, might cause problems as the difference between the input signal and the truncated version of its sampled version is increased in addition to the analog information loss that happens during the ADC action.

There may be other drawbacks of such a manipulation on the bit amount, especially during error detection and correction in digital communication systems which could be represented by the following basic schematic.

A basic form of a digital comms architecture

In the figure above; if we remove some of the LSBs (least significant bit) of the binary numbers that are created after the line decoder, we are likely to fail during the error correction phase of the information exchange which may lead to serious problems.

$\endgroup$
8
  • $\begingroup$ thanks for your response. What you have said is indeed the case but I am considering the case where noise is present The loss in dynamic range due to this is expected but as I mentioned in the comment to Hilmar's answer, what would be the effect on the ability to detect signals which are toggling bits lower that the ENOBs $\endgroup$
    – malik12
    Commented Nov 21, 2022 at 7:16
  • $\begingroup$ @malik12 Okay. So as far as I understand you want to delve into the case where noise is in effect and keep the adverse results on the input signal in the discrete domain, too. Obviously, you should keep those toggling bits so that you can somehow estimate the noise pattern on the sampled signal. Consequently, truncation of those LSBs would lead to the loss of that toggle phenomena, i.e., you may not able to detect the unwanted signal. $\endgroup$ Commented Nov 21, 2022 at 8:40
  • $\begingroup$ @karakonolos yes so apart from Dynamic range loss, this would be another disadvantage as well. so apart from these two, is their any other surprise as well? $\endgroup$
    – malik12
    Commented Nov 21, 2022 at 11:20
  • $\begingroup$ @malik12 I've updated my answer in light of your expectation and by considering an example case. $\endgroup$ Commented Nov 21, 2022 at 18:32
  • 1
    $\begingroup$ @malik12 No problem. $\endgroup$ Commented Nov 23, 2022 at 18:32

Your Answer

By clicking “Post Your Answer”, you agree to our terms of service and acknowledge you have read our privacy policy.

Not the answer you're looking for? Browse other questions tagged or ask your own question.