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I am trying to tune the Active PF Correction converter current and voltage loop to get a sinusoidal input current. I can get to a voltage reference, but the current looks like this. Reading the literature, the advantage of using APRC is that the input current is sinusoidal and the inductor current should be half sinusoidal.

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Ch1 is the inductor current.

When doing numerical simulations in MATLAB Simulink using this model.

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I can get both cases: a) with sinusoidal current and b) with the current resembling what I get on the oscilloscope. Two cases are recorded for the same input and output parameters. In the first case, you can see that the maximum current amplitude is lower compared to the second case.

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A blue signal is the inductor current. The difference is, in the first case Kp (for current and voltage loop is 100 higher) than in the second case. In both cases, I get to the voltage reference.

When I increase a proportional gain in DSP, the current starts to oscillate. Oscilgrams show waveforms for Kp_current * 10 and Kp_voltage * 4. One peak goes up and another down, even to zero if I increase Kp a bit higher. DC voltage is constant and does not change. I do not see nor can I replicate this behaviour in Simulink.

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Many months ago I was able to get a sinusoidal input current, it seems by luck :) Then I was trying to tune the DC link for a no-load case and reduce overshoot and now I cannot get a sinusoidal current back anymore. Unfortunately, I have not recorded the controller parameters :(

enter image description here

Ch3 is the inductor current & Ch4 is the input current.

How to tune Active PF Correction converter so I get a sinusoidal input current... becase it seems APFC has two steady-states depending on the controller parameters and in DPS I can achieve only one.

Update after some more simulations

In Simulink, both cases (with different controller gains) produce stable steady-state responses. In the real model, I also get a steady state response. However, when changing the gains I cannot get 'the other case', i.e. with sinusoidal current input.

It seems Active PFC has more steady-states with different input and inductor current waveforms, for example, for inductor current, depending mainly on the current proportional gain, I get a full half-sine waveform, a narrower symmetrical waveform or again narrower but shifted towards the right side current waveform (a case that I'm seeing on the scope). Control signals are well below limits. The current starts from t0 like that and does not change the shape, only amplitude as it settles.

The only thing I could see in Simulink is that in the 'correct' case current feedback signal matches the reference signal in the amplitude (Kp 100 times higher), and in the other cases, it does not.

  • Display1: yellow: reference, blue: feedback
  • Display2: error (ref - fbk); input to PI controller
  • Display3: PI output to PWM block

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Bode plot and bandwidth

Control System Block Diagram

Control System Block Diagram

  • $K_{pv}$ = 0.001, $T_{iv}$ = 0.01
  • $K_{pi}$ = 0.08, T_{ii}$ = 0.008 - $R$ = 163.33 Ohm, $C$ = 9.4 mF, $L$ = 6 mH, $R_L$ = 10 mOhm

$reg = K_p (1+ \dfrac{1}{sT_i})$

Current Loop

Open Loop TF: $ K_{pi} (1+ \dfrac{1}{sT_{ii}}) \dfrac{1}{sL+R_L} = \dfrac{s K_{pi}T_{ii} + K_{pi}}{s^2T_{ii}L + sT_{ii}R_L}$

Closed Loop TF: $ \dfrac{K_{pi} (1+ \dfrac{1}{sT_{ii}}) \dfrac{1}{sL+R_L}}{1+{K_{pi} (1+ \dfrac{1}{sT_{ii}}) \dfrac{1}{sL+R_L}}} = ... = \dfrac{s K_{pi}T_{ii} + K_{pi}}{s^2T_{ii}L + s(K_{pi}T_{ii}+T_{ii}R_L) + K_{pi}}$

Voltage Loop

Open Loop TF: $ K_{pv} (1+ \dfrac{1}{sT_{iv}}) \dfrac{1}{sL+R_L} \dfrac{s K_{pi}T_{ii} + K_{pi}}{s^2T_{ii}L + s(K_{pi}T_{ii}+T_{ii}R_L) + K_{pi}} = ... $

Bode plots for two different current proportional gain values (x1 and x0.01). This corresponds to the same waveforms in Fig. 4 and Fig. 5, respectively. By looking at Bode plots I cannot see why in the first case I get almost half-sine waveform and in the secodn case I do not (Fig. 5).

Bode Plot Open Loop

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  • $\begingroup$ What's your PWM frequency? Is the sampling process synchronized to the PWM? Have you modeled all the delays in Simulink? $\endgroup$
    – Ben
    Sep 25, 2022 at 11:46
  • $\begingroup$ @Ben. fsw is 4 kHz. Yes, I have created a triggered subsystem for the control block which is at the same frequency as in the DSP control section (5e-5). I have not modeled any delays. My Simulink and DPS parameters are different from the start... I was never able to get them the same. With the same parameters, the fbk signal in Simulink model has a much slower response (>10 sec), while in the real model is ~2 sec. $\endgroup$
    – mikebuba
    Sep 25, 2022 at 12:00
  • $\begingroup$ @mikebuba It looks like you're mostly throwing the dice, instead of going the engineering way. If your fs is 4 kHz then it seems too low. Try an order of magnitude higher, maybe even 100+ kHz. And the current ripple is very low, is there an input filter? If not, it hints at the inductor being way too large. By not showing your whole schematic you're making it difficult to analyze the problem. For example, I have doubts about the presence of that PLL. Not lastly, this seems better suited for ee.se (maybe the mods can move it). $\endgroup$
    – a concerned citizen
    Sep 25, 2022 at 14:53
  • $\begingroup$ @a concerned citizen. My mistake. The Active PFC switching frequency is 20 kHz. I have an inverter connected at the output, which is at 4 kHz. I am not trying with added white noise to my model signals to see if I can get something similar to the real model. There are no digital filters. I might try moving average filter next. $\endgroup$
    – mikebuba
    Sep 25, 2022 at 16:12
  • $\begingroup$ What is your inner loop bw? What is your outer loop bandwidth? $\endgroup$
    – Ben
    Sep 25, 2022 at 16:29

1 Answer 1

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Here's what I would try, these strategies are not mutually exclusive

  1. Try to run your real system in open-loop. Given that your system is a power-factor corrector, you could probably simulate or calculate the theoretical current waveform. If it behaves as expected, go to the next step. If not, try to see what's wrong.
  2. Maybe there are unmodeled delays in your Simulink model. I don't know if you're using the Simscape Power Systems, but there are some options regardingPWM and sampling. Make sure they match your settings in real-life.
  3. Make sure your data acquisition work properly. Are the sensors properly connected? Are your gains correct? Maybe you have a DC offset problem?
  4. Try to output your reference sine wave on a DAC. There should be some delay, but it should look similar to your voltage input. By the way, why is there an absolute value after the sin function? I think this is a mistake.
  5. Determine your closed-loop bandwidth for your inner and outer loops. Usually the inner loop bandwidth should 10x the outer loop bandwidth.

Edit : Another thing that puzzles me. You say your PWM frequency is 4 kHz. If that's the case, then the sampling period of your control loop should be 125 µs (2 samples per period), 250µs (1 sample per period) or 500 µs (1 sample per 2 periods). Yet, you mention 50 µs in your post.

Edit 2 : Is your C/C++ code manually translated or do you use automatic code generation ?

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  • $\begingroup$ The Active PFC switching frequency is 20 kHz (I made a mistake before in the text when I wrote 4 kHz). in DSP the ADC sample time is 100 µs for a 50 Hz signal AC, and the control sample time is 50 µs. $\endgroup$
    – mikebuba
    Sep 25, 2022 at 19:03
  • $\begingroup$ if the ADC sample time is 100 µs, why do you run the control loop at 50 µs? You should run the control loop only if there a new voltage and current sample. $\endgroup$
    – Ben
    Sep 25, 2022 at 19:05
  • $\begingroup$ I get a stable steady-steady state signal in both cases... I have updated my initial post with more figures and explanations. It seems the PI current controller gets 'stuck' at a certain waveform and does not even try to reduce the error to zero. However, when changing the gains, I can see the response and even get it to an unstable state, so the controller takes commands. $\endgroup$
    – mikebuba
    Sep 25, 2022 at 20:15
  • $\begingroup$ I've seen a case where the simulation would be stable but not in real-life. My colleague had design the inner loop with a BW higher than the sampling frequency. We redesigned the inner and outer loop and it became stable in real life. Again, you should have an estimate of your inner and outer loop bandwidths are. $\endgroup$
    – Ben
    Sep 25, 2022 at 21:15
  • $\begingroup$ I added the Bode plot to my initial post. My current controller reference is half-sine and PI should regulate and give me inductor current also half-sine, but somehow it cannot get there. It seems I have to manually guess the gains to match it... it does not self-regulate to half-sine. $\endgroup$
    – mikebuba
    Sep 26, 2022 at 14:07

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