First link is broken, the second link is about unrolling loops, so it's not entirely clear (to me) what exactly you mean by "array indexing". Anyway most of this heavily depends on the instruction set of the processor. For example and FIR filter would have to do something like this (in the innner loop)
- read filter coefficient
- read delayed input sample (state variable)
- multiply the two
- add to accumulator
- decrement coefficient pointer (or decrement coefficient read index)
- increment state pointer (or increment state read index)
- warp state pointer if needed (these tend to be circular buffers)
- decrement loop counter, test for 0
- jump to beginning of loop or past the loop depending on previous test
So that's a lot of stuff to do. Especially the "wrapping" part can be quite expensive as it includes a test for wrap around and a conditional which can break the pipeline on many processors.
Anyway on some processors, like a risc, or i86 this can easily take 10-20 cycles, on a dedicated DSP like an Analog devices Sharc or a TI TMS320 these take about half a cycle (can do two in a single CPU clock), so there is a huge dependency on instruction set efficiency. The tricks the second long talks about can help with avoiding the unwarpping part and also reduces the overhead for looping since you only do it once every 4 coefficients.