# What is the maximum rate of a coherent demodulator implemented in a PC?

I would like to implement my own xPSK coherent demodulator on a traditional PC connected to an acquisition board.

I am wondering what kind of bitrate it is possible to reach processing only with the microprocessor?

If it is the range of 100 kbits, 1 Mbits, 10 Mbits?

• The answer depends a lot on your CPU, memory bandwidth, samples per pulse, how much work the acquisition board performs, and the efficiency of your code. Having said that, I'd expect most current PCs to be able to handle 1 to 10 Mbps. If you add more details to your questions, someone may provide a more specific answer.
– MBaz
Commented Oct 3, 2021 at 17:26
• This question in its current form doesn't make that much sense. dsp_curious, imagine this: you've got a nearly perfect SNR and a time-invariant, flat channel. You can hence do 65536-PSK after synchronizing with a preamble once. Then the limiting factor becomes how quick you can determine the angle of a complex number of unit magnitude (that can be very fast, there's functionality in your CPU that makes that easy); you get 16 bit each symbol, too. No error correction is necessary, so channel decoding is not needed. Commented Oct 4, 2021 at 13:09
• Imagine on the other hand you have a time-variant, frequency selective channel and AWGN with an SNR of 6 dB. You're instantly limited by equalization, synchronization, and for all practical purposes channel code decoding, which you decide to do with an N=10000 LDPC (that's not unusual) message-passing soft decoder with at most 20 iterations. Due to the limited SNR, you go for QPSK, so you only get 2 bits per symbol. You can probably see how per bit, you need very different amounts of computation – multiple orders of magnitude different. Commented Oct 4, 2021 at 13:11
• You will hence have to tell us what the scenarios you care about are. I'll agree with MBaz, though: You'll be in the megabits with sufficiently optimized software (did you think about how much difference that can make?), as you'll probably figure out yourself once you research around common SDR platforms. Commented Oct 4, 2021 at 13:13
• (the next question is: if you're aiming for high data rates, why are you using PSK? Unless you have a specific channel (satellite comms, for example), you'd want to use a more complex constellation if you've got high enough SNR for high data rates (using 2¹⁶-PSK is a terrible choice; a 2¹⁶ QAM of the same average power has far far lower error probability); the choice of constellation depends on your channel and noise description, not on your PC. You will not make your computational load easier, either: deciding PSK isn't easier in general than QAM decision) Commented Oct 4, 2021 at 13:42

I think the question must be corrected as ksamples, or Msamples. It varies according to how many samples the system can process in real-time, modulation degree ($$m$$), and oversampling factor ($$OS$$). For digital communication systems, typically, receivers require more processing power when compared to transmitters. Therefore, the bottleneck will probably be caused by how complex your receiver is. For a basic setup (uncoded transmission), you can fetch the I/Q signal up to 5-10 Msample/sec. Assuming that you set your OS=4, you can roughly receive 1-2.5 Msymbols/sec. Secondly, for example, you use 8-PSK (each symbol conveying 3 bits), so the throughput (in an ideal case) is 3-7.5 Mbits/sec. Unfortunately, you should also insert some PHY frame headers as well as pilot sequences and time guards between the consecutive frames to accommodate a well-synchronized communication system. Therefore, the throughput may reduce by 20%.