I'm currently trying to build a PLL system to perform the fine frequency correction on a complex baseband signal, for the sake of simplicity I've adapted a Costas loop by replacing the sin/cos mixing with a complex rotation and removing the arm LPF. The missing piece in my understanding of this structure is what the "correct" choice of the loop filter is: from the literature I know a narrow LPF is enough to smooth the phase detector output, the error signal, and can be thus implemented with either a IIR or a PI loop.

Below is a block scheme of the whole system:

block scheme

Implementing both solutions in matlab yield vastly different results, when a PI is employed the PLL locks to the correct phase delta while the IIR-based solution locks onto a different (and wrong) value of phase.

The simulated channel has no noise, only a phase shift of a handful of tens of degrees.

The IIR filter is implemented using the Direct Form II structure and implements a 3rd order Butterworth filter with corner frequency of a few khz (few % of the sampling frequency).

The phase detector is implemented as $sign(\Re(x))\cdot\Im(x)$ (as descrived in Rice's "Digital Communications: A Discrete-Time Approach") since the received signal is BPSK-modulated. The same PD structure is employed in both the PLL attempts, replacing it with a (more computationally expensive) arctan-based one didn't yield any improvement.

The question are:

  • Are the PI and IIR LPF filters equivalent?
  • Is my understanding of this "modified" PLL structure correct?
  • Should the IIR filter work in this case?
  • $\begingroup$ "I've adapted a Costas loop by replacing the sin/cos mixing with a complex rotation and removing the arm LPF." Can you edit your question to include a block diagram of what you do have, or a more straightforward mathematical description? What is your phase detector? What is your frequency-varying element? I take it that your loop filter is currently a block with a question-mark inside -- that's fine, but we need to understand what's around it. $\endgroup$
    – TimWescott
    Aug 26 at 18:12
  • $\begingroup$ Done, I hope the question is more complete now. $\endgroup$ Aug 27 at 7:43
  • $\begingroup$ Have you tried to implement the PLL example in Rice's book? It is in Annex and would be suitable for your need I guess (formulas are well explained) $\endgroup$
    – gotchi85
    Aug 27 at 8:08
  • $\begingroup$ Rice's proposed PLL employs a PI loop filter that, as you've stated, is well explained in the book and does indeed work. My question is meant to check if my understanding of the loop and my design flow is correct. $\endgroup$ Aug 27 at 9:09

Are the PI and IIR LPF filters equivalent?

A PI filter is an IIR LPF, but a low-pass filter is more general. So -- no.

Is my understanding of this "modified" PLL structure correct?

I can't tell, but I think you're lacking in the understanding of closed-loop control systems.

Should the IIR filter work in this case?

Maybe, but it depends on your circumstance. Probably not if you're using a low-pass filter and my understanding of what you're doing is correct.

As you've written it, your PLL doesn't have a numerically-controlled oscillator, per se. Instead, the output of your loop filter is just a phase ($\phi$).

So there's no implicit integrators in the loop (typically an NCO is modeled as having the action $\phi(t) = \int \omega(t) dt$). That means that you have a type zero loop (no naked integrators).

A type zero loop will track a phase offset with some offset error. You can reduce this error by increasing the loop gain, but you cannot eliminate it.

If there's a frequency offset between your source and your receiver -- which there will be unless they're synchronized with each other -- then your phase offset will always be trending in one direction or another. Basically, your phase will be a ramp.

A type zero loop has an infinite offset error in the presence of a ramp. This is because in order to generate a phase offset, it needs some real phase error. In the case of your PLL, where the phase is modulo $2\pi$, this means that the phase error will ramp up to $\pm \pi$, then snap to $\mp pi$, then repeat. You'll have continual glitches.

If you use a PI filter, your loop becomes a type one loop (the "type" of a control loop is the number of pure integrators in the loop). In this case, your loop will track the frequency offset. The defining characteristic of a type 1 loop is that offset errors will be zeroed out, but its response to a ramp error is a constant offset error.

The loop that you've described may work well with a PI loop filter (or a PI + lowpass). The integrator will acquire the frequency offset, and the loop will settle out to some finite offset phase proportional to the frequency offset between transmitter and receiver. More integrator gain will reduce this offset, but not eliminate it.

This may work well if your frequency offset is small compared to the highest integrator you can attain with good loop stability.

Typical phase locked-loops for radio applications use at least a type two loop -- in analog circuits, one integrator is in the VCO, in a digital PLL that follows analog topology, the NCO will provide that function. Then the VCO or NCO is fed by a PI filter, which provides a second integrator.

Such a type two loop will be able to have zero phase error in the presence of a constant frequency error, regardless of how large this frequency error is.

It goes on -- if you want to track a satellite through doppler shift you may want a type three loop, but that's getting pretty specialized.

Bottom line -- your LPF won't work unless your receiver and transmitter are synchronized in frequency, and only have a small phase error. A PI filter will work as long as you only have a small frequency error. A pair of cascaded PI filters (or a filter that implements a proportional, integral, and double integral) will track arbitrarily large frequency errors, as long as the frequency error doesn't change too fast.

  • $\begingroup$ Aha, I made the fatal mistake of considering the IIR's filter delays as implicit integrators, I've basically built a Type-0 third-order PLL that, as you've explained, doesn't do much. And indeed, when simulated and feed a signal with zero (or extra small) phase error, the loop locks and then keeps jumping back and forth around $\pm\pi$ or locks to the wrong value. $\endgroup$ Aug 30 at 8:25

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