# I/Q sampling with just one ADC

Usually I/Q sampling is performed on two signals with a 90° phase shift using separate ADCs. Suppose I have only a single (fast) ADC available to perform I/Q sampling, which approaches do exist? Is this an entirely stupid idea?

A bit of background: I've been toying with the idea of building an amateur radio HF receiver. Yesterday the Raspberry Pi Pico microcontroller board was released. However I was disappointed to learn that it has only a single 12 bit, 500kS/s ADC, making it impossible to implement a conventional I/Q baseband receiver with dual ADCs.

There are two approaches I found:

• Connect the in-phase and quadrature components to two different pins. Alternate between the components of the signal in the ADC. Then interpolate the signal to remove the phase shift between the samples.
• Mix the signal with a higher intermediate frequency and filter it in such a way that successive samples are equivalent to the I, Q, -I, -Q components of the signal at the desired frequency. See the drawing and explanation on the first page of this paper: "Ziomek, C., & Corredoura, P. (1995, May). Digital i/q demodulator. In Proceedings Particle Accelerator Conference (Vol. 4, pp. 2663-2665). IEEE." (PDF)

Is this an entirely stupid idea?

No, but you've just came to the conclusion that instead of sampling complex, with Nyquist rate being the bandwidth, you should do twice as many samples.

That simply means you're not doing IQ sampling, but low-IF or direct-RF sampling.

Mix the signal with a higher intermediate frequency and filter it in such a way that successive samples are equivalent to the I, Q, -I, -Q

so, multiply the real and imaginary parts with 1, -1, 1, -1 … each , then sample them.

1, -1, 1, -1 is is a cosine at exactly half the sampling rate. What you're mathematically doing is multiplying your IQ signal with a cosine + j· sine, each of half the sampling rate. $$\cos ft + j\sin ft = e^{jft}$$, i.e. that's a simple frequency shift.

That simply shifts up your signal from $$f \in [-b/2; +b/2]$$ to $$f \in [0; b]$$. I.e. you've just put your $$b$$-Bandwidth signal on an intermediate frequency of $$b/2$$. That's a low-IF heterodyne receiver, which existed before IQ was even discovered.

So, clearly, you can do that. I'd avoid shifting to only b/2, use something slightly higher if your bandwidth and sample rate allows, and forget all you've learned about complex sampling – we're back in real domain, and you simply have to sample with a rate that's higher than twice the bandwidth.

Also: As much hype there is around the RP2040: There's nothing new about having two cortex-m0 cores. It's not an especially fast microcontroller or anything, it really doesn't open any "new doors". The things that are nice about it are its flexible IO logic, but you need none of that.

In fact, these cores are ubiquitous, basically every semiconductor company sells microcontrollers based on that core. Although it's dual-core and clocked at a rather high rate, it's the last microcontroller that makes sense here: You need something that can process samples, not two high-clocked cortex-M0 cores that have no floating point and only rudimentary integer arithmetics. Get something with a Cortex-M4F instead. You might be getting a faster ADC, too.

• I know your answer is more about the real sampling approach but I'd add one background note for OP to keep in mind with I/Q sampling DAC/ADC architectures are the problems associated with I/Q imbalance, DC Offset, etc - although we have some good ways to compensate for these with algorithms, they can be annoying. Also the first approach OP mentions for doing IQ sampling with a single ADC is also known as 'ping-ponging' Jan 22 at 22:49
• Thanks for pointing out that I should just sample in the real domain! I will read about filters for image rejection in low-IF receivers. Still need to figure out how to best vary them for different frequencies (or I start with a fixed frequency). I got too hyped for RP2040 (thanks for telling me!), even the common Blue Pill/Black Pill boards are better suited for the task. It's a pity that the former has dual ADCs but the latter a FPU. Maybe I find a cheap-ish board with both. Jan 23 at 10:48
• @user67081 good to know that "ping-ponging" is the term. Rather confusingly "ping pong" is also used to describe the opposite: interleaving the samples from multiple ADCs to sample a single signal: Interleaving ADCs: Unraveling the Mysteries Jan 23 at 11:02
• I must admin I've heard the term in neither context! Jan 23 at 11:25