I would like to know in general where the advantages and disadvantages are:

  1. Downsampling of a high sampled continuous analog signal in FPGA or µC and
  2. Direct use of a lower sampling rate, i.e. using an analog to digital converter with a lower sampling rate ? Are there any differences or does it have the same effect ? Because almost every DSP-System i see uses a way Oversampling followed by Decimation (Downsampling + AAF-Filter) instead of adequate Sampling Rate without Decimation.


  • $\begingroup$ uhm, i still dunno what exactly is the question. is it about the relative merits of two different ways of doing sample-rate-conversion? perhaps asynchronous sample-rate-conversion (ASRC)? one is the analog way with an D/A, analog LPF, and A/D at the new rate. the other is purely digital. is this what the question is about? $\endgroup$ Sep 28, 2020 at 4:44
  • $\begingroup$ Hi, the question is about the advantages and disadvantages between sampling a signal either at the desired sampling rate (using an ADC with exactly this sampling rate), or first a significant oversampling and then reaching the desired sampling rate by downsampling. - Because almost every DSP-System i see uses a way Oversampling followed by Decimation (Downsampling + AAF-Filter) instead of adequate Sampling Rate without Decimation. $\endgroup$
    – Rabobsel
    Sep 28, 2020 at 9:00
  • $\begingroup$ so is the question about what is called "Sigma-Delta" conversion? $\endgroup$ Sep 28, 2020 at 17:11

3 Answers 3


There are many advantages, but the most obvious to me

Advantage 1 :

Oversampling followed by decimation allows you use to simpler and smaller anti-aliasing filters. These filters cost less, take up less space on a PCboard, draw less power, etc.

Advantage 2 :

In multi-channel applications, the tolerance and variation of the analog components of your anti-aliasing filters can cause skew between the channels. The cut-off frequency is determined by the value of the resistors and capacitors. While it's easy to get resistor with a ± 0.1% tolerance, it is much harder to get capacitors with a ± 0.1% tolerance. A ballpark estimate yields a ± 1% bandwidth tolerance for an order-1 filter, 2% for an order-2 filter, etc.

Oversampling followed by decimation will make the overall bandwidth more dependant on the digital anti-aliasing filter (in the decimation process) and less on the analog anti-aliasing filter. If your application requires a 0.1 % bandwidth tolerance between multiple channels, oversampling is the way to go.

Disadvantage :

You need faster ADCs and faster digital electronics (CPU, or FPGA). It costs more and usually draws more power.


With downsampling you have complete control over the process and it comes down to what compromise of processing complexity, delay, aliasing and loss of passband you can accept.

With a lower rate A/D you are pretty much at the mercy of someone elses spectral trade-offs and in addition you get the quantization/noise of one analog pass.


  • $\begingroup$ I disagree with your second paragraph -- it assumes that you don't get any say in the analog circuitry before the lower-rate ADC. In theory you could do any amount of filtering in analog-land before ADC-ing. It's just that in many practical problems, it's easier to sample fast and do filtering in digital-land, then decimate. $\endgroup$
    – TimWescott
    Sep 27, 2020 at 18:35
  • $\begingroup$ True. But commercial AD and DA (at least for audio) tends to employ multi rate topologies, and might offer a choice between a couple preset filter characteristics. While you could, in principle, do additional purely analog filtering in between them, I dont think that is practical for the kind of filter orders one typically are interested in here. My point about noise/quantization still stands. $\endgroup$
    – Knut Inge
    Sep 27, 2020 at 18:40

And additional consideration not mentioned that comes up in radio design is in the decision to use quadrature sampling of a baseband signal (as in "Zero-IF receivers") over a "Digital-IF" receiver that is achievable when the signal can be sampled at a much higher rate as a real signal. The Digital IF signal avoids the quadrature imbalance errors that would be introduced in the analog at both the local oscillators and notably in the I and Q signal paths after the down-conversion from analog RF or IF takes place. This latter effect is much more challenging to compensate for given its variation over frequency.


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