# Quantization processs

In a quantization process what happens when the signal range is more than the quantizer range?

Suppose i have a sinusoidal signal which ranges from -5 to +5 but the quantizer which has four levels ranges from -3 to 3.now for the samples which are greater than 3 and less than -3 what will happen?

## 2 Answers

In a typical quantization like that seen in an ADC the output would saturate any value > 3 to 3 (also known as clipping). Note that if you're considering a software quantization, it's also possible that some quantizers (although IMO poorly designed ones) could cause out of range values to wrap around and switch signs.

A "quantization process" is a mathematical abstraction.

Things like analog to digital converters, conversions from wider databusses to narrower databusses, etc., are actual physical processes.

A purely mathematical process that quantizes in steps of 2 (i.e., $$\left \lbrace \cdots, -3, -1, 1, \cdots \right \rbrace$$ would just keep quantizing, because its effects would extend to infinity in both directions.

When you model some real thing that quantizes, you need to model the behavior of that real thing.

In general, an ADC will, when you put a voltage on it that's a bit outside of its range, return a number at its extreme -- i.e. a 12-bit ADC might return h'fff or h'000. But if you put a voltage on an ADC that's a lot outside its range (usually more than one diode drop), then all sorts of weird chip-specific bad things happen. They don't latch up and get hot any more (that I know of), but about 20 years ago I worked with an 8-channel ADC that would, if any one channel exceeded the design voltage, get erroneous readings on all eight channels.

OTOH, a stage that narrows a datapath by lopping off bits from the least-significant end will just increase quantization, while a stage that narrows a datapath by truncating bits from the most-significant end may wrap (i.e., h'80000 may become h'0000, for a really big difference in apparent magnitude).

So its generally best to find out or figure out what the hardware actually does when signals exceed their design limits, and model that.