I have been working on converting a simple, floating point algorithm to fixed point and need to create a block diagram to help the guy who will implement this on an FPGA. As often is the case, the output can be represented as a linear combination of (the real and imaginary parts) of some input signals.
I would like to create a clear block diagram that shows bit-widths, rounding vs truncation, saturation at each point, bit shifts (due to multliplying integers with fractions) etc. (Do you use Qmn notation in the diagram?). Most of what I've seen online is either so detailed with HW registers, etc that I can't actually tell what's going on or so high level, that it's essentially a conceptual representation of the algorithm with some annotations containing bit widths.
While I recognize that there is no one right answer, I'm curious to know how others create good diagrams to hand the algorithms off to implementers.