As explained in the answer here, for the symbol timing recovery loop we need to keep loop bandwidth sufficiently below the modulation bandwidth of the signal so as to avoid the filtering of the signal itself.
But when we send a random sequence of bits the corresponding baseband signal will contain frequencies from $-\frac{f_s}{2}$ to $+\frac{f_s}{2}$, where $f_s$ is the symbol rate.
Since the signal has spectrum even at low frequencies, how can we ensure that the signal will not be filtered by the timing recovery loop?
I am asking because of the following reason:
1. I generate the PSK modulated data and add phase noise on it
dataMod = pskMod(dataVec, 8, 'gray');
tx_out = dataMod.*exp(1i*ph_out);
Here, the ph_out
is the phase jitter signal and dataMod
is the PSK modulated signal of the dataVec
symbol stream.
2. I pass the phase of the data to the carrier recovery loop:
pll_out = pll(angle(tx_out), 0.005, 1e-6, 1e-3, 1);
pll_out1 = pll(ph_out, 0.005, 1e-6, 4e-3, 1);
pll_out2 = pll(angle(dataMod), 0.005, 1e-6, 1e-3, 1);
I create three different outputs, pll_out
is the loop output with the complete signal, pll_out1
is the loop output with only the phase noise as input and pll_out2
is the output with only the signal (without noise) as the input.
I see the following at the output of the tracking loop:
1. The power spectral densities for input and output phase noise:
From this, I can see that the low frequency phase noise is getting filtered as expected.
From this, it is seen that the signal power at low frequencies is filtered. But because of this filtering additional "noise" or "distortion" (whatever is the correct term) causes the following PSD at the output (yellow):
The frequency roll-off is explained very well by Dan here. But somehow now, the roll-off is not the problem for me.
3. The total noise at the PLL loop output is thus:
So, although the signal distortion/noise does not affect me at high frequencies (and its roll-off doesn't matter anymore) but my low frequency noise gets degraded.
So, how can we ensure that most of the signal power is outside the PLL bandwidth?