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Sigma delta modulation is extensively used in quantization to reduce quantization noise.

In the literature one can see different architecture for example python-deltasigma to implement a modulator. One can learn the output of the modulator by implementing the filters or one can convert the problem into a state space model and design the modulator based on A,B,C,D parameters of the state space model. The question: is there a difference or advantage/disadvantage in working with state space model instead of implementing the filters as per the architecture, specifically for FPGA implementation.

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    $\begingroup$ the oversampling, error-feedback (what we call "noise shaping" in audio) , and low-pass filtering done in the decimation process is what reduces quantization noise. sigma-delta is noise-shaped quantization when the quantizer is a 1-bit quantizer (i.e. a comparator, essentially the $\operatorname{sgn}(\cdot)$ function). $\endgroup$ – robert bristow-johnson Nov 13 at 1:11
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    $\begingroup$ the feedback filter is what can be modeled as a state-space model, but the nonlinearity of the 1-bit quantizer is not a function of the state-space model but is applied outside of it. $\endgroup$ – robert bristow-johnson Nov 13 at 1:13
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Probably not much advantage either way, possibly unless you've got a really high-order modulator (in which case someone else will have to answer!)

If the state-space representation is a single-input single-output system, and if it's linear, and if it's running in steady-state, and if data path widths aren't an issue, then there's no difference between it and a "more traditional" IIR filter implementation such as a set of biquads.

If you've got some super-high-order modulator, or if someone's gone and invented a nifty nonlinear way to get more performance out of a sigma-delta modulator when I wasn't looking, then maybe -- but I doubt it.

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