I have a design in which a signal from ADC is filtered and then played by DAC. In FPGA the real signal is converted to quadrature using DDS with 70 MHz frequency. After filtering, the baseband signal is sent to DAC. DDS of DAC is also set to 70 MHz.
The problem is that there is always a spur in output of DAC at 70 MHz. Noise level is almost -93 dBm and this spur is -82 dBm while the main signal level is -15 dBm.
Level of spur does not depend on the signal level, as long as signal passes through filter. My first guess was that this is because of signal truncation. There are two steps of truncation in design. I have used convergent rounding instead of truncation but the spur is still there; decreased by almost 6 dB but still there. then I wondered that this might come from ADC, but changing the frequency of input signal does not change the spur; It's always at 70 MHz. Then I taught that it might be because of DAC LO but when the signal is in rejection band of filter, the Spur disappears.
Do you have any idea what makes this spur and how can I remove it?
Any help would be appreciated.