1
$\begingroup$

I'm implementing a scattered look-ahead IIR filter in Matlab/VHDL, basically I convert an order-2 IIR filter into an order-4 IIR in order to take advantage of the pipelining of an FPGA. (reference http://people.ece.umn.edu/users/parhi/SLIDES/chap10.pdf)

Anyway, I'm trying to evaluate how many bits I need in every stage and I was wondering if there is a metric to evaluate the "quality" of the quantization.

For example an error of 0.1% in the transient of a step response doesn't matter much but a a neverending limit cycle of 0.1% after the transient would be a problem.

I was thinking of using a metric like m = error^2 * n

where error is the difference between the reference double implementation and my fixed-point implementation and "n" is the sample number so an error at sample 100 would weigh more than error at sample 1.

I would need to balance quantization errors with FPGA resources and FPGA speed of course.

Are there other metrics? Am I on the right track?

$\endgroup$
  • $\begingroup$ You could also look at the effects of quantizing the coefficients. If you aren't using some very conservative scaling strategy you could also look at the possibility of overflowing the internal states or output. You could also look at the 'shape' of the quantization noise (its spectrum) so instead of just computing the broadband error then compute a frequency dependent SNR. Sometimes it is also interesting to analyze the behavior of the filter when modulating the coefficients. $\endgroup$ – niaren Aug 22 at 5:38
2
$\begingroup$

Any type of test result will be extremely dependent on the implementation, the filter coefficients and the actual input signal. Typically you would start with a detailed mathematical analysis of your filter implementation and calculate the transfer function from the input to each of the state variables. Based on either sine-wave scaling or "absolute sum of impulse response scaling" you can determine the max value of your states and determine the scaling that prevents clipping. The number of bits is then determined by your required SNR and how the noise propagates from the state variables to the output.

Next your check your rounding behavior: Safest is "round towards zero". That leaves a little of of SNR on the table, but it prevents any type of limit cycles.

Finally you test it. You either construct the worst case signals and or create a set of test signals that covers anything that can happen in your application including some of the corner cases. Than, indeed, a simple "RMS error" metric is a good choice.

$\endgroup$
  • $\begingroup$ Out of curiosity, is there anywhere a detailed tutorial or example for this approach? $\endgroup$ – Irreducible Aug 22 at 13:07
  • $\begingroup$ Not that I know off. If the filter is benign, you do everything in Direct Form 1, and you can afford to throw in a few extra bits to avoid clipping and maintain SNR, than it's not a big deal. However if you want to a 4th order butterworth highpass at 40 Hz with a sample rate of 44.1kHz, you'll need to do a lot of work. Each pole pair has over 90dB of gain, which is difficult to manage in fixed point (and sometimes even in floating point) $\endgroup$ – Hilmar Aug 23 at 14:09

Your Answer

By clicking “Post Your Answer”, you agree to our terms of service, privacy policy and cookie policy

Not the answer you're looking for? Browse other questions tagged or ask your own question.