# QPSK Phase Recovery : Maximum-likelihood Vs Costa's Loop

I have implemented a QPSK Costa's loop in GNU Radio and run some BER benchmarking. All is going well. Out of curiosity, I'm trying to implement the Maximum Likelihood phase recovery shown below. For the Costa's loop, a loop bandwidth, which specifies gain constants for the loop filter (F(z)) and the integrator, of a few percents of the symbol rate is adequate. My question is, first of all, since the ML phase recovery doesn't seem to have any traditional loop filter (e.g. proportional-plus-integrator), does the very concept of loop bandwidth apply? If the concept of loop bandwidth is applicable, how do you set it and what are the appropriate values (in relation to symbol rate, maximum frequency offset etc)?

UPDATE

Harris' ML structure

• the $\mathbf \Sigma$ could be understood as low pass filter, namely exactly what you said: an integrator! May 8 '19 at 16:54
• @Moses my original post details the considerations for setting the loop BW and the trade space involved. If you can’t find it (it is one of my first 5 postings) let me know and I will did it up and paste in the link. May 9 '19 at 1:11
• I found it but am on my phone and don’t know how to link it from that: the title is “Loop BW for Symbol Timing Recovery” and the explanation is applicable to both symbol and carrier recovery loops. May 9 '19 at 1:14
• Thanks for the nice article @DanBoschen. From what I understand, loop bandwidth and damping factor are a nice way of specifying PLL coefficients. The problem I have with Michael Rice's structure is the lack of PLL loop filter. I have included a digram from one of Harris' theses. Which structure is correct? May 9 '19 at 17:03
• I agree there should be a loop filter. Also the tanh and SNR scaling are rarely implemented in practice (to my understanding). The tanh function is reasonably approximated with a sign() or even better a limited signal: y= x for small x and y = sign(x) for large x. You can try out those options if you implement this to see the pros and cons. Also observe the similarity to the phase detector in this post dsp.stackexchange.com/questions/31497/… when you use sign(x) vs tanh May 10 '19 at 9:47

## 1 Answer

There is still a loop with an adjustable loop bw: The summing block shown is an indication of the additional integration to create a second order loop, although a proportional path should be included as well in order to maintain stability (PI Loop Filter, here with what is suggesting an accumulator you would only have "I"). I suspect the block diagram is just simplified and the summation shown is intended to be the more detailed proprtional-intergral loop filter structure as shown in your subsequent diagram.

Even without the summing block this will still be a loop with adjustable loop BW, just not the best choice: in this case it would be a first order loop that will lock to constant error given a constant frequency offset (and be unconditionally stable if not for parasitic delay elements the implementation will invariably have). If the loop gain is large (set by scaling the value at the input to the DDS), then the error can be minimized- but still exists. Adding the additional proportional-integral loop filter before the DDS input will maintain stability and lock to zero error in this frequency offset condition.

(The DDS, similar to a VCO is directly proportional to frequency- so in units of phase it forms one integrator in the loop- with the PI loop filter added, we get the second integrator, and with both at DC to form a second order Type 2 Loop).

As I mentioned in the comments, if you do implement this as given, compare results to a fixed scaling (instead of the SNR) and the sign of the signal (instead of tanh) and let us know your results of that versus the optimal implementation shown.