I am trying to calculate self noise of a digitization system with differential inputs.For this purpose, i select a differential channel, set input range to +/-5 V, short both differential inputs and performed following steps:
- Collect 'x' no of samples of voltage signal
- Perform FFT of size 'x' on collected samples
- Divide each complex output of FFT by 'x'
- Find the absolute of each complex output of FFT
- Multiply the output of above step by 1.414 to get Vrms against each frequency bin
- Take log10 and multiply by 20 of each output in above step
- Add 10xlog10(x/2) in each output of step above to compensate FFT gain against noise
The result is self noise floor graph of a channel in terms of dBVrms Vs frequency.
Kindly guide me whether this method is accurate enough to estimate self noise of a digitizer?