I am trying to calculate self noise of a digitization system with differential inputs.For this purpose, i select a differential channel, set input range to +/-5 V, short both differential inputs and performed following steps:

  1. Collect 'x' no of samples of voltage signal
  2. Perform FFT of size 'x' on collected samples
  3. Divide each complex output of FFT by 'x'
  4. Find the absolute of each complex output of FFT
  5. Multiply the output of above step by 1.414 to get Vrms against each frequency bin
  6. Take log10 and multiply by 20 of each output in above step
  7. Add 10xlog10(x/2) in each output of step above to compensate FFT gain against noise

The result is self noise floor graph of a channel in terms of dBVrms Vs frequency.

Kindly guide me whether this method is accurate enough to estimate self noise of a digitizer?



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