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I have a filter described by the following transfer function H(z):

$$H(z) = \frac{156 - 156z^{-2}}{16384 - 32443z^{-1}+16073z^{-2}}$$

How will this be implemented with the first term in the polynomium being different from 1?

Normally i would implement the filter with something like: $$y[0]=156\cdot x[0]-156\cdot x[2] +32443\cdot y[1]-16073\cdot y[2]$$

but in this case, it is missing the term: $$-16384\cdot y[0]$$

How may this term be inserted? I have tried just inserting it, inserting and shift the y's by 1. I just get noise doing this (looks like overflow).

It is to be implemented in VHDL on a FPGA.

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  • $\begingroup$ Hi! I guess you actually want to ask something about integer valued coefficients to be used in FPGA arithmetic hardware ? $\endgroup$
    – Fat32
    Commented Oct 30, 2018 at 17:27
  • $\begingroup$ Yes, that must be it. $\endgroup$
    – keffe
    Commented Oct 30, 2018 at 17:30
  • $\begingroup$ Then so what's the question about that integer, how to scale it properly ? Please put a lot more hardware and numeric format details. $\endgroup$
    – Fat32
    Commented Oct 30, 2018 at 17:31
  • $\begingroup$ I have scaled it by multiplying by 2^14, and bit-shifted 14 times to get my output. If i just send x[0] to myoutput, it is fine. If i add the rest of the differnece exuation, i get noise looking like overflow. I am not sure of this is an FPGA implementation problem, or a problem with my difference equation. $\endgroup$
    – keffe
    Commented Oct 30, 2018 at 17:35
  • $\begingroup$ there's a problem withe the LCCDE. $\endgroup$
    – Fat32
    Commented Oct 30, 2018 at 17:36

1 Answer 1

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Filter output has to be divided by the first term of denominator. In this case, division by 16384 can be effectively done by logical shift 14 bits to the right.

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