# External frequency divider in a PLL

Does a frequency divider external to the loop BW of a PLL cause any phase ambiguity ? and why? and is the result of dividing by an odd number different than dividing by an even number?

• seems to me that if you're dividing the frequency of the VCO (or NCO for a digital PLL) by an integer (let's call that integer $N$) that the end behavior with the phase discriminator and the lower frequency is unchanged, no matter what which of the $N$ VCO cycles is aligned with the onset of the lower frequency cycle. and this would be the case whether $N$ is even or odd. – robert bristow-johnson Sep 13 '18 at 0:24