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Suppose I have a sinusoidal signal of 50Hz sampled at 6.4kHz and I wished to filter it at:

Band pass: 160Hz, Bands stop: 800Hz, Apass:0.1db, Astop: 106db

For a FIR filter order of 40 I would get 41 number of taps. The group delay would thus be (41-1)/2 = 20.

Am i wrong in thinking that if I extended (/zero padded at the end of) the data block size to be filtered by the estimated group delay above, I would be compensating for the group delay?

For example if I had 128 samples (corresponds to a full sine cycle at 50Hz-Fs=6.4Khz) to be filtered and added the group delay 128+20=148. Now, if I were to filter these 148 samples with the above stated filter, would I not get a signal with no group delay?

Thanks Alex

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No.

There is no way you can compensate for a broad-band group delay without violating causality. If you add zeros at the end of your signal, the group delay stays constant and if you add zeros in front of it, the group delay goes up.

At some frequencies it may look that there is no group delay (or phase shift), but that's just an illusion: the phase of the filter at this frequency just happens to be an integer multiple of two pi. If you look at any other frequency, it won't be true any more.

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  • $\begingroup$ You could zero pad at the end and trow the same number of samples away from the front of the filtered signal. $\endgroup$ – fibonatic Jun 2 '18 at 1:06
  • $\begingroup$ @fibonatic: "throwing away samples from the front" is a non-causal operation. It's a negative delay: The output depends on future values of the input. $\endgroup$ – Hilmar Jun 3 '18 at 12:58
  • $\begingroup$ That is true, but since the question suggested zero padding it might suggest that the signal is not filtered in real time, but processed after all the data is collected, in which case this would be allowed. $\endgroup$ – fibonatic Jun 3 '18 at 17:18
  • $\begingroup$ To clarify, the data is processed after a block (128 samples) has been buffered from the ADC. $\endgroup$ – almost_linear Jun 4 '18 at 8:38
  • $\begingroup$ Its a delta sigma ADC and the filtering is part of Decimation processes, further down the signal chain. $\endgroup$ – almost_linear Jun 4 '18 at 15:04

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