I've run a lot of simulations and it seems like DSSS is just as noise resistant as people say it is. Resistant from jamming and even it seems some fading and narrow-band interference. I'm doing this simply by signal correlation - taking the FFT of the desired signal, and the FFT of the demodulated signal, multiplying in frequency space and IFFT'ing to look at the output in linear time.
I'm interested in running a VERY low data rate (<100 bps) but moderately wide-band signal (~2.8 MHz bandwidth), as to minimize impact on the spectrum and being able to recover the signal in extremely poor quality. I'd also like to maintain a very high degree of signal orthogonality to other sources. This would mean a very long chip sequence (I'm hoping for 4096 or so).
I'd like to do this so all communications can pass over the DSSS path. Everything seems to work perfectly so long as the clocks remain perfectly (or almost perfectly synchronized).
If I have my clocks out by as little as 40 ppm, it seems to start confusing the end and beginning of the chunks. The only way around this I can think of is run several decoders, each at a slightly different chip frequency and seeing if any of the detectors get a match.
ACTUAL QUESTION: Is there any magical way to recover a DSSS signal with poor synchronization this that doesn't take a linear number of logical receivers over the frequency space?