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A lag filter/compensator has the form

$$G_c(s) = \frac{s+z}{s+p}$$

with $-z < -p < 0$. In practice, the effect of lag compensation in feedback control is to increase the DC gain of the open-loop system by a factor $G_c(0)=z/p$, which improves the ability of the closed-loop system to track low-frequency reference signals. The tradeoff is that the open-loop system incurs a phase shift of $-\pi/2$ for $\omega > z$.

But in the limit as $p$ approaches the origin, we are left with a PI controller, which has the form

$$G_c(s) = K_p + \frac{K_I}{s} = \frac{K_p s + K_I}{s}$$

This has infinite DC gain ($|G_c(0)|$), meaning the closed-loop system now achieves zero steady-state error in response to a step reference. The only tradeoff I can see compared to the lag filter is that there is a phase shift of $-\pi/2$ for $\omega < p$, but I don't see why this is a problem in practice.

Since steady-state error is improved as the pole moves closer to the origin, why would you ever use a lag filter (with $z > 0$) rather than just place the pole at the origin?

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  • $\begingroup$ I was mainly taught that (lead/)lag filter can be used to increase phase margin at the crossover frequency. $\endgroup$ – fibonatic Jan 31 '17 at 23:49
  • $\begingroup$ I believe that is the case only for lead compensation ($-p < -z < 0$), since the lag compensator has strictly negative phase. $\endgroup$ – Max Feb 1 '17 at 12:15
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Well, the two systems differ only at low frequencies. In fact is you define $$ R_L = \dfrac{\tau_zs+1}{\tau_ps+1},\qquad R_I = \dfrac{\tau_zs+1}{\tau_ps} $$ you have that $R_I(j\omega)\underset{\omega\to\infty}{\to}R_L(j\omega)$. Therefore, you can expect that the behavoiur of the closed-loop system differs only at lower frequencies.

What does the PI do?
Consider a plant $G(s)$, define $L_I(s)=R_I(s)G(s)$ and $L(s)=R_L(s)G(s)$.Define the functions \begin{align*} F(s) &= \dfrac{L(s)}{1+L(s)},& S(s)&=\dfrac{1}{1+L(s)}, & D(s)&=\dfrac{G(s)}{1+L(s)} \end{align*} $F$ is the transfer function between the reference and the output, $S$ those between a disturbance acting at the output of $G(s)$ and the system output and $D$ those between a disturbances acting additively on the control input and the system output. As you easily see, at frequency $\omega=0$ you have $F(j0)=1$, $S(j0)=0$, $D(j0)=0$. This says that at front of any constant unknown references and/or disturbances you always get zero error, provided that the system is stable.

What a lag net cannot do
With a lag controller you do not have such robustness property. In fact, even if by using a lag net together with an appropriate feedforward action, you can still have zero steady state error at front of constant references, that is not a robust solution. The reason is simply that the feedforward control law will (highly) depend on the plant parameters, therefore, as you put an uncertainty on the plant you lose the zero error property.

With an integral action instead, as long as the system is stable, you always obtain a zero error at front of constant references and/or disturbances, no matter how big is the parameter uncertainty. The only thing you need to ensure is the closed-loop stability, and note that to stabilize a system you don't really need perfect knowledge of the parameters and you typically can tolerate quite high uncertainties.

So why should I use lag controllers?
Well, If you need robust regulation at front of constant references and/or uncertainties there is no theoretical reason to go for a lag controller. I would definitely go for a PI. However, not all the tasks are about regulating a system at front of constant references. Having a pole in the origin to track a sinusoid is not that awesome, is it. The point is, what do you need your controller to do? Every answer to this question needs a different controller, and you typically chose your lag/PI/whatever to shape the frequency response of the closed loop system. Think about this: how would you design a controller to have zero error at front of references that are sinusoids at frequency $\omega=3$?

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  • $\begingroup$ Just to be clear: the results that $F(j0)=1$, $S(j0)=0$, and $D(j0)=0$ are for the PI controller rather than the lag controller? It seems that unless the plant has a pole at the origin, $|F(j0)|<1$ for the lag controller. In any case, the last paragraph very clearly answers my question. Thanks. $\endgroup$ – Max Feb 1 '17 at 12:13
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    $\begingroup$ yes, definitely. Obviously that holds only if $G(s)$ does not have any zero in the origin! $\endgroup$ – LJSilver Feb 1 '17 at 12:15
  • $\begingroup$ For the record, you can use a resonant controller to track a sinusoid at w = 3. $\endgroup$ – Ben Apr 2 at 18:40
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Question:

Since steady-state error is improved as the pole moves closer to the origin, why would you ever use a lag filter (with $z > 0$) rather than just place the pole at the origin (as a PI controller does)?

TL;DR:

Realizable systems have saturations. During a saturation, the controller command embodied in the pole at zero can attempt to integrate to infinity.

Answer:

Because of Reset Windup.

Integral windup, also known as integrator windup[1] or reset windup,[2] refers to the situation in a PID feedback controller where a large change in setpoint occurs (say a positive change) and the integral terms accumulates a significant error during the rise (windup), thus overshooting and continuing to increase as this accumulated error is unwound (offset by errors in the other direction). The specific problem is the excess overshooting.

Why do we care?:

Integral windup particularly occurs as a limitation of physical systems, compared with ideal systems, due to the ideal output being physically impossible (process saturation: the output of the process being limited at the top or bottom of its scale, making the error constant). For example, the position of a valve cannot be any more open than fully open...

What can we do about it?:

Most PID controllers have some sort of Anti-Reset Windup parameters. These do work great, especially when they are aware of the system non-linearity's. But it is also possible, as noted in the question, to not put the pole all the way to zero. One way to think about it is that we are trying to increase the gain of low frequencies to remove steady state (DC) offsets. If you have a 16-bit A/D reading your physical property, this has at best, roughly 100 db of signal to (quantization) noise. So, anymore than 100db of low frequency gain in an effort to remove DC error will have no practical benefit. On the other hand, distinguishing between a pole that is 5 decades slower than your plant and a pole at zero is likely a distinction of little or no value.

(Source for Quotes)

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  • $\begingroup$ I'm not sure I understand the relevance of this quote. Is the point that placing the lag pole closer to the origin results in increased overshoot? If so, is it possible to see this from the frequency response, e.g., is this related to the DC phase shift? Or is there some other reason that this should be obvious? $\endgroup$ – Max Jan 31 '17 at 22:00
  • $\begingroup$ Added some background. Let me know if that helped. $\endgroup$ – Stephen Rauch Jan 31 '17 at 23:19
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    $\begingroup$ I do not agree. You can easily get rid of windup by suitable anti windup schemes. Moreover the pole in the origin is related to the internal model property, that is a really feneral principle that holds for general nonlinear systems. A pole in the origin permits you to have robust regulation at front of constant references $\endgroup$ – LJSilver Feb 1 '17 at 9:15
  • $\begingroup$ @LJSilver, thanks for the comment and the great answer. I did not intend to intimate that PI control was somehow inadequate. Simply trying to give OP some insight as to why LAG might be useful, and why PI might not always be the answer, as that was his question. But you gave a much better answer to that question. $\endgroup$ – Stephen Rauch Feb 1 '17 at 16:56

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