When sampling a signal, it is standard practice to use a sampling rate that is greater than two times the bandwidth of the signal in order to avoid aliasing. The result is then low-pass filtered (and sometimes upsampled prior to this) in order to get rid of the harmonics.
Unfortunately, in control systems applications preventing aliasing in not enough. The system also needs to respond quickly enough to the input (as determined by a spec), and a low sampling rate will limit this performance. Specifically, if the system samples a signal at time t, then any event that occurs immediately afterwards will be ignored until one sampling period later. Thus, there are clear performance advantages to having a sampling rate much greater than two times the signal bandwidth. I'm looking to quantify this performance improvement.
Consider an open-loop control system that attempts to cancel out an incoming signal by outputting an inverted version of this same signal. In other words, active compensation through destructive interference. If the system has infinite magnitude resolution (both the ADC and DAC have infinite bits) and an infinite sampling time, then the inverted output signal will be a perfect inverse of the original and the signals will cancel out completely. But if the system has a finite sampling rate, then the output signal will not be a perfect inverse of the original and the two will not cancel completely. The lower the sampling rate, the worse the cancellation will be (even if no aliasing occurs).
Q: Assuming the following:
The input signal is a sinusoid of frequency $f_0$ and magnitude $A$
The system has an ADC with a sampling rate of $f_s$ where $f_s > 2 f_0$
The system uses sample-and-hold (ZOH) interpolation to output an inverted sinusoid and add it to the original signal
The system has zero time delay between an ADC sample and the corresponding DAC output (ADC settling time, DSP calculations, etc. are instantaneous)
How do I calculate the frequency and magnitude of the resulting frequency components?