I have designed a CIC filter in Verilog and I would like to test its impulse response, but I am not sure where to start from.
My input sampling frequency is 51200Hz, the filter is a third order decimating CIC with downsampling ratio = 256, so the output sampling frequency is 200Hz. The differential delay was set to one.
The input word is one bit wide, while the output will be 16 bits. I have already calculated all the internal registers dimensions and I am satisfied with that, my current Verilog design does not use true registers but integer numbers so that is not a problem anyway.
How am I supposed to compute its impulse response?
First of all there's the problem that the sequence '1000...' is not an impulse, because 1 corresponds to +1 while 0 corresponds to -1. I have solved that doing two simulations, one with '10101010...' and the other with '11010101010...' as input sequences. The impulse response is then half of the sum of the two responses. So far so good.
Since I want the frequency magnitude response referred with the output sampling frequency I figured that my input impulse should be 256 high frequency samples wide, is that correct? I have done such a simulation and computed the specter in Matlab, the result is qualitatively satisfying but I have a lot of noise, especially in the low frequency part of the specter. I have also tried some windowing without much luck. I simulated my sistem for about half a second, that's 25000 samples.
I must note that my simulation output gives out samples at an higher non constant rate, I've tried resampling my signal with no luck.
Given my limited experience with digital signal processing I am out of ideas. Is there something fundamentally wrong in my approach? Is it ok but there's something I should poke to get better results?