I am using a Sigma Delta ADC and really understood the working of it I need to sample a signal at 8.5 Mhz. The SD ADC has a Demodulator and decimating FIR filter The Oversampling ratio options are 32/64/128/256 and FIR filter has 32 taps What should be OSR ratio and how to determine the FIR coefficients Thanks

  • $\begingroup$ Which converter are talking about? Are you sampling the signal/information at 8.5mhz or is this the internal clock and cycle rate of the converter? $\endgroup$
    – rrogers
    Jun 25, 2015 at 17:01
  • $\begingroup$ Dear Sir, I need to sample at 8.5 Mhz and its a 12 bit SD ADC $\endgroup$
    – Mahesh
    Jun 29, 2015 at 4:15
  • $\begingroup$ I meant manufacturer and model number:) $\endgroup$
    – rrogers
    Jun 30, 2015 at 13:40
  • $\begingroup$ We are using a processor that supports SD ADC and that has these variables. $\endgroup$
    – Mahesh
    Jul 2, 2015 at 4:34
  • $\begingroup$ I am sorry but I can't get a grasp of your application; but I think the following will be helpful: electronicdesign.com/analog/… -- it seems to cover the different facets of oversampling. $\endgroup$
    – rrogers
    Jul 3, 2015 at 12:07


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