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Lets say we want implement simply the mean with constant coefficients. So all b's are set to e.g. b=0.5. In this case I do not understand the delay line in the picture below.

I mean I understand it for von Neumann, Harvard architectures.., but how about if I just calculate everything on parallel FPGA? Shouldn't be possible to implement the whole structure without any delays? (..because it is all parallel and there is no feedback) or is it in practice just not possible?

http://en.wikipedia.org/wiki/Finite_impulse_response#/media/File:FIR_Filter.svg

(What I would understand is that there is maybe a delay at the end when the summation takes place)

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I'm not sure if I understood our question right, and therefore sorry if I point something wrong, but the delay in the delay line comes from signal sampling and not from computational processing type. Therefore whether you realize that signal flow graph in a von Neumann type serial architecture or in aparallel FPGA based architecture doesn't matter. You will always have the delay per input sample as dictated by your systems sampling rate.

On the other hand of course a parallel implementation would take much less clock cycles, based on the amount of parallelisation, to compute per sample output campared to a serial architecture of a general purpose CPU, however as I said the delay in the delay line is nothing related with computational delay of the hardware system.

Finally the signal flow graph yields a pictorial representation of processing structure, you don't really implment those delays. They are represented by registers or memory locations, as possibly you know, which are updated either per sampling clock or via buffer copies which provides that delay effect represented in the flow graph.

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  • $\begingroup$ Oh ok, thanks of course for measuring audio, communication signals in real-time that seems to be the correct answer. So but how about images and already available (simulation) data? My guess is that then these filter delays are not appropriate anymore. $\endgroup$ – Randy Welt Jun 2 '15 at 18:20
  • $\begingroup$ Yes true! For image signals those delay elements come from adjacent space pixels, not from prast or future time based samples, therefore you can access them in parallel at one instant. For moving pictures, you may have both space and time based samples for which picture frame rate represents your timing clock. $\endgroup$ – Fat32 Jun 2 '15 at 20:59

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