I'm currently in the process of writing DSP code, based on the amazing RTLSDR project, and using this as a vehicle to teach myself the basics of DSP (I have an extensive background in software development, but none whatsoever in physics, EE or DSP.)
Specifically, I am trying to implement FSK from scratch using only the most basic building blocks of DSP, and writing all the code by myself. Up until now I have managed to do the following:
- Extract a stream of I/Q samples via the RTLSDR interface
- Calculate the angle of each I/Q pair on the unit circle by calculating
- Calculate the phase by subtracting each pair of two consecutive I/Q samples
atan2(q_2, i_2) - atan2(q_1, i_1)
So now I have a stream of phases, and I can basically "see" the signal going round and round on the unit circle with values between
[0-2*PI). If we look at FSK, this stream will be moving slightly faster whenever a high bit is transmitted, and slightly slower on the low bits. This is where I'm stuck.
The implementation I'm testing right now basically counts how many samples have passed since the last time a full circle has completed, but this seems very prone to errors due to noise.
How do I calculate, from this stream, whether I am currently on a high bit, or a low bit? Since I am just teaching myself here, I'm looking for the most basic method for this step, no complicated algorithms, just yet. Thanks!