# frequency divider

How would one implement a frequency divider? I know I can resample up and then treat it as if I'm at the same frequency, however I want to divide the frequency of my signal by 2 and keep the same number of samples.

I've tried multiplying by a cosine wave at half the frequency then low pass filtering. However the problem with this approach is the timing of the output wave matches the signal mixed in and not the original signal. I need the timing to match the original signal, just be at half the frequency.

• Can you clarify? Are you trying to (a) implement a DSP system that halves the frequency of an analog signal? Or are you (b) entirely in the digital domain (for instance, doing Matlab simulation)? If (a), I think you'll need to resample. If (b), it may be as simple as multiplying your time vector by 2. – MBaz Oct 10 '14 at 20:50
• are you talking about a pitch shifter? – endolith Oct 10 '14 at 20:54
• I'm in matlab and am developing an algorithm that will eventually have to work with sampled data. Also the output of this frequency halving will have to be at the same sample rate or atleast align up with the original signal as it contains a clock signal that is needed. I'm developing the sychronozation for MSK. I discovered that I could multiply by cos(w/2) to get the outcome I wanted. – tylerjw Oct 10 '14 at 21:55
• Just be aware that multiplying by a cosine may introduce unwanted harmonics. It might work if your signal is relatively narrowband and you low-pass filter it afterwards. – MBaz Oct 11 '14 at 0:22
• @endolith, it sure sounds like he's talking about shifting down an octave. – robert bristow-johnson Oct 12 '14 at 1:09

Going by your last comment, I assume I've hit the task you were trying to accomplish.

This is pretty easy to do in software. We'll call you input signal I and your output signal C

Do the following:

1. C starts out at value zero.
2. Watch the values for I. When I goes from negative to positive ( or crosses some other threshold going up) set C to 1
3. Watch the values for I. When I goes from negative to positive ( or crosses some other threshold going up) set C to 0
4. Repeat steps 2 and 3.

For every sample of I, you get a C that is either 0 or 1. You can send the C value to a DAC or process it further.

This will generate a square wave at half of the frequency of the signal from I.

In an analog system "sharpening the rising edge" (see my earlier comment) would be accomplished by amplifying the signal. Digitally, you can either set a fixed threshold and multiply the incoming values, or lower the threshhold.

The accuracy of the synchronization depends on the sharpness of the rising edge. The sharper the better. With a perfectly vertical edge, the generated clock will be one sample behind the real signal. The slower the rising edge goes up, the more the generated C will lag. At worst you will be 1/2 of a cyle behind, but that takes a really flat rising edge.