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I am working on a system that is implementing a digital filter that was designed for another system that had an FPU and a 12bit ADC. The system that I am working on is using the same filter without an FPU using a 12 ADC and fixed point arithmetic.

The ADC resolution is 3.3v / 2^12 = 0.000805664062v

With an FPU each ADC integer value could be scaled with the above resolution.

On the system using fixed point where 

m2^-e, e = 10

The resolution would be 

2^-10 = 0.0009765625

This leads me to think that the use of fixed point is giving me slightly lower resolution.

Looking at it differently and representing a delta between ADC integers with 14bits for the fraction the resolution could be

2^(-11) + 2^(-12) + 2^(-14) = 0.000793457031

but then the range would be perceived as less than 3.3V

Is this thinking correct?

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Is this thinking correct?

Yes, if you insist on storing in your variables a fixed-point number representing a voltage, in Volts. Then you are loosing $2 - \log_2{3.3} = 0.28$ bits of resolution. But why would you have to do so?

Your ADC conversion routine will give you a raw 12-bit value. Don't touch it, or shift it left, and nothing will be lost - as long as you remember that what you are manipulation are in units of $3.3/2^{12}$ Volts.

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  • $\begingroup$ no, that thinking is not correct. there is no difference in ADC resolution from whether the CPU or DSP is fixed or floating point. $\endgroup$ – robert bristow-johnson Jul 7 '14 at 15:53
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    $\begingroup$ The question is about perceived ADC resolution. If some application requirements stipulate that the ADC reading routine must return an integer that represents the ADC reading in Volts, with a 10-bit fractional part, then yes, there is a loss of precision. The loss does not come from the ADC, but from this rather poor choice of data representation. $\endgroup$ – pichenettes Jul 7 '14 at 16:12
  • $\begingroup$ a loss of resolution due to (poor practices of) rounding in an algorithm is loss of resolution due to rounding in the algorithm. it has nothing to do with the ADC resolution. there is no reason that the fixed-point algorithm cannot put a few bits to the right of the binary point. the answer to the question: "Does fixed-point usage lower perceived ADC resolution" is decidedly "No." $\endgroup$ – robert bristow-johnson Jul 7 '14 at 16:17
  • $\begingroup$ @pichenettes You suggest that there be no shifting, but how would this be done when the units will change during the application of the filter? For example what would you do if you had an addition after a multiplication? $\endgroup$ – Steven Eckhoff Jul 8 '14 at 17:55
  • $\begingroup$ My suggestion was to avoid any premature scaling/conversion step (such as scaling by 3.3V) right after the conversion. You will have to shift right after multiplications. $\endgroup$ – pichenettes Jul 8 '14 at 22:16
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it may turn out to be very inconvenient, but you can do essentially anything in fixed-point that you can do in floating. as long as you got "Add-with-carry" as an instruction and enough MIPS to do all of the multiword instructions you may need. the 12 bits that come from your ADC don't care if it's fixed or floating and your ADC resolution is the same regardless. can't promise that the quality of code coming out of a C compiler will be any good.

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Well, fixed-point has a higher average resolution than floating-point using the same number of bits, although that result is not so much of interest here.

The question you have to ask yourself is: does the fact that the maximum input is interpreted as 3.3 and not, say, 4 pose a major constraint in your system?

As pichenettes answered while writing this answer: just remember the scale of the input once you interpret the output of the filter. What you will need to think about though, implementing the filter in fixed-point is scaling, i.e., avoiding overflow and utilizing as much of the numerical range as possible.

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