I am new to digital filters and trying to understand parameters behind them.
I am trying to get DC value from signals sampled at 100kHz sampling rate. such high frequency is used due to system hardware limitations. A very sharp low-pass filter is to be used with cut-off frequency at 1Hz. The plan is to capture 10000 ponints first and then FIR-Decimate the income signal with several stages:
- stage 1: decimation factor 10, FIR cutoff frequency 1/20 (128 taps), 100kHz->10kHz
- income 10000 points, result 1000 points
- stage 2: decimation factor 10, FIR cutoff frequency 1/20 (128 taps), 10kHz->1kHz
- income 1000 points, result 100 points
- stage 3: decimation factor 10, FIR cutoff frequency 1/20 (128 taps), 1kHz->100Hz
- income 100 points, result 10 points
- stage 4: decimation factor 10, FIR cutoff frequency 1/20 (128 taps), 100Hz->10Hz
- income 10 points, result 1 point
- Then a FIR with cut off frequency will be implemented with cutoff frequency 1/10.
- In the FIR decimation, the FIR cut-off frequency is always stricter than the decimation factor to avoid aliasing, is this design necessary?
- What are the tradeoffs of choosing number of decimation stages and decimation factors?
- At stage 4, there are only 10 income points. However, FIR has 64 taps... Would the one point result still be valid?