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Timeline for ADC Aliasing in RFSoC

Current License: CC BY-SA 4.0

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Oct 18 at 12:33 comment added Dan Boschen @Yair Yes agreed- that is what I meant when I said he needs a high pass that rejects 800 MHz but passes desired frequency in the Nyquist Zone starting at 896 MHz. That isn’t a very challenging filter to implement (48 taps or so) but given he sees aliasing down to that frequency suggests that is the edge of the transition band for the filter actually used
Oct 18 at 5:57 comment added Yair M @DanBoschen I agree of course with statement regarding the aliasing after decimation, but if a proper digital LPF is employed prior to decimation I would assume one wound see any signal if the input is 800MHz. The RFsoc implements such filters and they are configurable.
Oct 18 at 3:19 history edited Dan Boschen CC BY-SA 4.0
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Oct 17 at 17:43 history edited Dan Boschen CC BY-SA 4.0
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Oct 17 at 17:29 comment added Dan Boschen Great, glad it was clear. The whole polyphase thing really complicates it, but if you dig through that you'll recognize that the exact same thing is occuring. Rate conversion in digital to digital is the same as going from analog to digital and the "extended frequency axis" view I use really helps a lot in providing intuition about that.
Oct 17 at 17:28 history edited Dan Boschen CC BY-SA 4.0
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Oct 17 at 17:28 comment added MIchaelNilan @DanBoschen Thank you for your detailed explanation
Oct 17 at 17:27 vote accept MIchaelNilan
Oct 17 at 17:24 history edited Dan Boschen CC BY-SA 4.0
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Oct 17 at 14:38 comment added MIchaelNilan @DanBoschen Could you be able to provide me a graphical explanation? I am not using any filters prior to the supply of the signal and after the ZCU1275.
Oct 17 at 11:17 comment added Dan Boschen (If not I can add another graphic to make that clearer, but it sounds like your confusion is with aliasing/imaging that occurs with digital sampling).
Oct 17 at 11:15 comment added Dan Boschen @MIchaelNilan The analog filter would be what you would supply prior to the input to the ZCU1275 for the ADC and after the output for the DAC, and the digital filter for decimation is what you would implement in the fabric. Regardless the aliasing and imaging is exactly what you would expect. There is nothing you can do digitally to eliminate the aliasing (ADC) and imaging (DAC) you describe, that is all in the job of the analog filter (and the analog filter to reject that would be very challenging). Was my explanation about that clear enough?
Oct 17 at 10:38 comment added MIchaelNilan @DanBoschen Thank you for your detailed answer. I have no control over the filters as I am using the available ADC and DACs in ZCU1275 RFSoC for this purpose. I understand that the sampling rate is too low to achieve a higher bandwidth for the pass through design. However, I am limited by the given sampling rate for now.
Oct 17 at 9:55 comment added Dan Boschen @YairM 800 MHz is within the 7th Nyquist zone of the output decimated rate. That decimation is just like another A/D conversion (A/D is resampling from an infinite sampling rate to the 2.048 GHz rate. And then the decimation is resampling from 2.048 GHz to 256 MHz rate -- -all anti-aliasing considerations for filtering ahead of that downsampling apply the same as we would consider with the A/D converter. So if he has a high pass from 896 GHz to 1.024 GHz as I show as part of that polyphase, that high pass needs to pass > 896 GHz but reject 800 MHz.
Oct 17 at 6:00 comment added Yair M Doesn’t the OP state that he sees the phenomenon also at 800MHz which is within the first Nyquist zone? However, the OP states he uses decimation. I guess aliasing occurs due to the specifics of the digital LPF
Oct 17 at 1:33 history edited Dan Boschen CC BY-SA 4.0
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Oct 16 at 22:51 history answered Dan Boschen CC BY-SA 4.0