I am pretty new to DSP and have been looking at how image scaling is done in hardware. I and came across a 2D scaler core for an FPGA here. I have read up a bit about polyphase filters, but am confused about what the "16 phases" referred to on page 3 with the following diagram are.

I have not come across this elsewhere and was hoping for some insight as to what is going on here.

My best guess is that they limit the available interpolation points to 16 discreet points in $x$ and the same for $y$, and so any fractional scaling where a sample point falls between $2$ of these $1/16^{\rm th} sampling points, will just use the closest point to it?

Any insight would be much appreciated.

I am pretty new to DSP and have been looking at how image scaling is done in hardware. I and came across a 2D scaler core for an FPGA here. I have read up a bit about polyphase filters, but am confused about what the "16 phases" referred to on page 3 with the following diagram are.

I have not come across this elsewhere and was hoping for some insight as to what is going on here.

My best guess is that they limit the available interpolation points to 16 discreet points in $x$ and the same for $y$, and so any fractional scaling where a sample point falls between $2$ of these $1/16^{\rm th}$ sampling points, will just use the closest point to it?

Any insight would be much appreciated.

I am pretty new to DSP and have been looking at how image scaling is done in hardware. I and came across a 2d scaler core for an FPGA here. I have read up a bit about polyphase filters, but am confused about what the "16 phases" are they refer to on page 3 with the following diagram.

I have not come across this elsewhere and was hoping for some insight as to what is going on here.

My best guess is that they limit the available interpolation points to 16 discreet points in x and the same for y, and so any fractional scaling where a sample point falls between 2 of these 1/16th sampling points, will just use the closest point to it?

any insight would be much appreciated

I am pretty new to DSP and have been looking at how image scaling is done in hardware. I and came across a 2D scaler core for an FPGA here. I have read up a bit about polyphase filters, but am confused about what the "16 phases" referred to on page 3 with the following diagram are.

I have not come across this elsewhere and was hoping for some insight as to what is going on here.

My best guess is that they limit the available interpolation points to 16 discreet points in $x$ and the same for $y$, and so any fractional scaling where a sample point falls between $2$ of these $1/16^{\rm th} sampling points, will just use the closest point to it?

Any insight would be much appreciated.

I am pretty new to DSP and have been looking at how image scaling is done in hardware. I and came across a 2d scaler core for an FPGA here. I have read up a bit about polyphase filters, but am confused about what the "16 phases" are they refer to on page 3 with the following diagram.

I have not come across this elsewhere and was hoping for some insight as to what is going on here.

My best guess, as this core is hardware agnostic, is that they limit the available interpolation points to 16 discreet points in x and the same for y, and so any fractional scaling where a sample point falls between 2 of these 1/16th sampling points, will just use the closest point to it.

I'm guessing is that doing it this way this would make the multiplication easier for weighting the sampled pixels, as it would just be a bit shift.

Assuming that this is what's going on, is this a typical way that something like this would be implemented in hardware. Would this not mean that potentially scaling by a large factor say 64 would mean multiples of 4 consecutive output pixels would take on the same value? rather then individually being interpolated at their exact location?

I've spent more time googling and thinking about what's going on here than I care to admit, so any insight would be much appreciated, or indeed if I have totally missed something here.

I am pretty new to DSP and have been looking at how image scaling is done in hardware. I and came across a 2d scaler core for an FPGA here. I have read up a bit about polyphase filters, but am confused about what the "16 phases" are they refer to on page 3 with the following diagram.

I have not come across this elsewhere and was hoping for some insight as to what is going on here.

My best guess is that they limit the available interpolation points to 16 discreet points in x and the same for y, and so any fractional scaling where a sample point falls between 2 of these 1/16th sampling points, will just use the closest point to it?

any insight would be much appreciated