Timeline for Preloading an IIR Filter
Current License: CC BY-SA 4.0
3 events
| when toggle format | what | by | license | comment | |
|---|---|---|---|---|---|
| Nov 16, 2019 at 17:02 | comment | added | Max Yaffe | Thanks, i'll try this and let you know how it works. And the DC component is an issue with my application. | |
| Nov 15, 2019 at 14:15 | comment | added | Bob | Note that this trick is very useful in the case where the input has a DC component that you are trying to remove. Typically you would need to wait quite a long time for the the filter to settle (assuming a high ratio of Fs/Fcutoff). By delaying the filter operation until the input register is filled, the output appears on cycle 3 with no DC component, and no long settling tails. | |
| Nov 15, 2019 at 14:05 | history | answered | Bob | CC BY-SA 4.0 |